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| 2012 | ||
|---|---|---|
| 47 | Mustafa Berke Yelten, Paul D. Franzon, Michael B. Steer: Process mismatch analysis based on reduced-order models. ISQED 2012: 648-655 | |
| 46 | Samson Melamed, Thorlindur Thorolfsson, T. Robert Harris, Shivam Priyadarshi, Paul D. Franzon, Michael B. Steer, W. Rhett Davis: Junction-Level Thermal Analysis of 3-D Integrated Circuits Using High Definition Power Blurring. IEEE Trans. on CAD of Integrated Circuits and Systems 31(5): 676-689 (2012) | |
| 45 | Yi Lou, Zhuo Yan, Fan Zhang, Paul D. Franzon: Comparing Through-Silicon-Via (TSV) Void/Pinhole Defect Self-Test Methods. J. Electronic Testing 28(1): 27-38 (2012) | |
| 2011 | ||
| 44 | Paul D. Franzon, W. Rhett Davis, Thorlindur Thorolfsson, Samson Melamed: 3D Specific Systems: Design and CAD. Asian Test Symposium 2011: 470-473 | |
| 43 | Paul D. Franzon, W. Rhett Davis, Thorlindur Thorolfsson, Samson Melamed: 3D specific systems design and CAD. ICSAMOS 2011: 326-329 | |
| 42 | Ting Zhu, Mustafa Berke Yelten, Michael B. Steer, Paul D. Franzon: Application of Surrogate Modeling in Variation-aware Macromodel and Circuit Design. SIMULTECH 2011: 502-508 | |
| 41 | Thorlindur Thorolfsson, Nariman Moezzi Madani, Paul D. Franzon: Reconfigurable five-layer three-dimensional integrated memory-on-logic synthetic aperture radar processor. IET Computers & Digital Techniques 5(3): 198-204 (2011) | |
| 2010 | ||
| 40 | Steve Lipa, Thorlindur Thorolfsson, Paul D. Franzon: The NCSU Tezzaron design kit. 3DIC 2010: 1-15 | |
| 39 | Thorlindur Thorolfsson, Guojie Luo, Jason Cong, Paul D. Franzon: Logic-on-logic 3D integration and placement. 3DIC 2010: 1-4 | |
| 38 | Paul D. Franzon, John Wilson, Ming Li: Thermal isolation in 3D chip stacks using vacuum gaps and capacitive or inductive communications. 3DIC 2010: 1-4 | |
| 37 | Paul D. Franzon, W. Rhett Davis, Thorlindur Thorolfsson: Creating 3D specific systems: Architecture, design and CAD. DATE 2010: 1684-1688 | |
| 36 | Thorlindur Thorolfsson, Samson Melamed, W. Rhett Davis, Paul D. Franzon: Low-Power Hypercube Divided Memory FFT Engine Using 3D Integration. ACM Trans. Design Autom. Electr. Syst. 16(1): 5 (2010) | |
| 2009 | ||
| 35 | Thorlindur Thorolfsson, Samson Melamed, Gary Charles, Paul D. Franzon: Comparative analysis of two 3D integration implementations of a SAR processor. 3DIC 2009: 1-4 | |
| 34 | Eun Chu Oh, Paul D. Franzon: Technology impact analysis for 3D TCAM. 3DIC 2009: 1-5 | |
| 33 | Samson Melamed, Thorlindur Thorolfsson, Adi Srinivasan, Edmund Cheng, Paul D. Franzon, William Rhett Davis: Junction-level thermal extraction and simulation of 3DICs. 3DIC 2009: 1-7 | |
| 32 | Menglin Tsai, Amy Klooz, Alexander Leonard, Jennie Appel, Paul D. Franzon: Through Silicon Via(TSV) defect/pinhole self test circuit for 3D-IC. 3DIC 2009: 1-8 | |
| 31 | Thorlindur Thorolfsson, Kiran Gonsalves, Paul D. Franzon: Design automation for a 3DIC FFT processor for synthetic aperture radar: a case study. DAC 2009: 51-56 | |
| 30 | Thorlindur Thorolfsson, Nariman Moezzi Madani, Paul D. Franzon: A low power 3D integrated FFT engine using hypercube memory division. ISLPED 2009: 231-236 | |
| 29 | William Rhett Davis, Eun Chu Oh, Ambarish M. Sule, Paul D. Franzon: Application Exploration for 3-D Integrated Circuits: TCAM, FIFO, and FFT Case Studies. IEEE Trans. VLSI Syst. 17(4): 496-506 (2009) | |
| 28 | Liang Zhang, J. M. Wilson, Rizwan Bashirullah, Lei Luo, Jian Xu, Paul D. Franzon: A 32-Gb/s On-Chip Bus With Driver Pre-Emphasis Signaling. IEEE Trans. VLSI Syst. 17(9): 1267-1274 (2009) | |
| 2008 | ||
| 27 | Ruchir Puri, Devadas Varma, Darvin Edwards, Alan J. Weger, Paul D. Franzon, Andrew Yang, Stephen V. Kosonocky: Keeping hot chips cool: are IC thermal problems hot air? DAC 2008: 634-635 | |
| 26 | Paul D. Franzon, W. Rhett Davis, Michael B. Steer, Steve Lipa, Eun Chu Oh, Thorlindur Thorolfsson, Samson Melamed, Sonali Luniya, Tad Doxsee, Stephen Berkeley, Ben Shani, Kurt Obermiller: Design and CAD for 3D integrated circuits. DAC 2008: 668-673 | |
| 25 | Yuan Xie, Jason Cong, Paul D. Franzon: Editorial: Special issue on 3D integrated circuits and microarchitectures. JETC 4(4): (2008) | |
| 2007 | ||
| 24 | Ullas Pazhayaveetil, Dhruba Chandra, Paul D. Franzon: Flexible Low Power Probability Density Estimation Unit For Speech Recognition. ISCAS 2007: 1117-1120 | |
| 23 | Meeta Yadav, Ashwini Venkatachaliah, Paul D. Franzon: Hardware Architecture of a Parallel Pattern Matching Engine. ISCAS 2007: 1369-1372 | |
| 22 | Liang Zhang, J. M. Wilson, Rizwan Bashirullah, Lei Luo, Jian Xu, Paul D. Franzon: Voltage-Mode Driver Preemphasis Technique For On-Chip Global Buses. IEEE Trans. VLSI Syst. 15(2): 231-236 (2007) | |
| 2005 | ||
| 21 | Liang Zhang, John Wilson, Rizwan Bashirullah, Lei Luo, Jian Xu, Paul D. Franzon: Driver pre-emphasis techniques for on-chip global buses. ISLPED 2005: 186-191 | |
| 20 | Numan Sadi Dogan, Paul D. Franzon, Wentai Liu: Impact of an SoC Research Project on Microelectronics Education: A Case Study. MSE 2005: 33-34 | |
| 19 | Paul D. Franzon, David Nackashi, Christian Amsinck, Neil DiSpigna, Sachin Sonkusale: Molecular Electronics - Devices and Circuits Technology. VLSI-SoC 2005: 1-10 | |
| 18 | W. Rhett Davis, John Wilson, Stephen Mick, Jian Xu, Hao Hua, Christopher Mineo, Ambarish M. Sule, Michael B. Steer, Paul D. Franzon: Demystifying 3D ICs: The Pros and Cons of Going Vertical. IEEE Design & Test of Computers 22(6): 498-510 (2005) | |
| 17 | Monther Aldwairi, Thomas M. Conte, Paul D. Franzon: Configurable string matching hardware for speeding up intrusion detection. SIGARCH Computer Architecture News 33(1): 99-107 (2005) | |
| 2004 | ||
| 16 | Liang Zhang, Wentai Liu, Rizwan Bashirullah, John Wilson, Paul D. Franzon: Simplified delay design guidelines for on-chip global interconnects. ACM Great Lakes Symposium on VLSI 2004: 29-32 | |
| 15 | J. A. Palmer, James F. Mulling, Brian Dessent, Edward Grant, Jeffrey W. Eischen, Alexei Gruverman, A. I. Kingon, Paul D. Franzon: The Design, Fabrication, and Characterization of Millimeter Scale Motors for Miniature Direct Drive Robots. ICRA 2004: 4668-4673 | |
| 2001 | ||
| 14 | Andreas Kuehlmann, Robert W. Dutton, Paul D. Franzon, Seth Copen Goldstein, Philip Luekes, Eric Parker, Thomas N. Theis: Will Nanotechnology Change the Way We Design and Verify Systems? (Panel). ICCAD 2001: 174 | |
| 1999 | ||
| 13 | B. E. Duewer, J. M. Wilson, D. A. Winick, Paul D. Franzon: MEMS-Based Capacitor Arrays for Programmable Interconnect and RF Applications. ARVLSI 1999: 369-377 | |
| 12 | Paul D. Franzon, Mark Basel, Aki Fujimara, Sharad Mehrotra, Ron Preston, Robin C. Sarma, Marty Walker: Parasitic Extraction Accuracy - How Much is Enough? DAC 1999: 429 | |
| 11 | Mouna Nakkar, David G. Bentlage, John Harding, David Schwartz, Paul D. Franzon, Thomas M. Conte: Dynamically Programmable Cache Evaluation and Virtualization. FPGA 1999: 246 | |
| 10 | Toby Schaffer, Andy Stanaski, Alan Glaser, Paul D. Franzon: The NCSU Cadence Design Kit for IC Fabrication through MOSIS. MSE 1999: 88-89 | |
| 1997 | ||
| 9 | Mir Azam, Paul D. Franzon, Wentai Liu: Low power data processing by elimination of redundant computations. ISLPED 1997: 259-264 | |
| 8 | Hong-Yean Hsieh, Wentai Liu, Paul D. Franzon, Ralph K. Cavin III: Clocking Optimization and Distribution in Digital Systems with Scheduled Skews. VLSI Signal Processing 16(2-3): 131-147 (1997) | |
| 1995 | ||
| 7 | Sharad Mehrotra, Paul D. Franzon, Michael B. Steer: Performance Driven Global Routing and Wiring Rule Generation for High Speed PCBs and MCMs. DAC 1995: 381-387 | |
| 1994 | ||
| 6 | Sharad Mehrotra, Paul D. Franzon, Wentai Liu: Stochastic Optimization Approach to Transistor Sizing for CMOS VLSI Circuits. DAC 1994: 36-40 | |
| 1993 | ||
| 5 | Todd A. Cook, Paul D. Franzon, Edwin A. Harcourt, Thomas K. Miller III: System-Level Specification of Instruction Sets. ICCD 1993: 552-557 | |
| 4 | Paul D. Franzon, Robert J. Evans: A Multichip Module Design Process for Notebook Computers. IEEE Computer 26(4): 41-49 (1993) | |
| 1992 | ||
| 3 | Ajay Dholakia, T. M. Lee, Donald L. Bitzer, Mladen A. Vouk, L. Wang, Paul D. Franzon: An efficient table-driven decoder for one-half rate convolutional codes. ACM Southeast Regional Conference 1992: 116-123 | |
| 2 | Paul D. Franzon, Slobodan Simovich, Michael B. Steer, Mark Basel, Sharad Mehrotra, Tom Mills: Tools to Aid in Wiring Rule Generation for High Speed Interconnects. DAC 1992: 466-471 | |
| 1990 | ||
| 1 | D. Bout, Paul D. Franzon, J. Paulos, T. Miller, W. Snyder, T. Nagle, Wentai Liu: Scalable VLSI implementations for neural networks. VLSI Signal Processing 1(4): 367-385 (1990) | |
Colors in the list of coauthors
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