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| 2011 | ||
|---|---|---|
| 58 | Michael David Black, Manoj Franklin: Teaching computer architecture with a graphical PC simulator. ITiCSE 2011: 337 | |
| 2010 | ||
| 57 | Rania H. Mameesh, Manoj Franklin: Speculative-aware execution: a simple and efficient technique for utilizing multi-cores to improve single-thread performance. PACT 2010: 421-430 | |
| 2008 | ||
| 56 | Jizhu Lu, Michael Perrone, Kursad Albayraktaroglu, Manoj Franklin: HMMer-Cell: High Performance Protein Profile Searching on the Cell/B.E. Processor. ISPASS 2008: 223-232 | |
| 55 | Joonhyuk Yoo, Manoj Franklin: Hierarchical Verification for Increasing Performance in Reliable Processors. J. Electronic Testing 24(1-3): 117-128 (2008) | |
| 2007 | ||
| 54 | Joonhyuk Yoo, Manoj Franklin: Prioritizing verification via value-based correctness criticality. ICCD 2007: 333-340 | |
| 53 | Mohamed M. Zahran, Kursad Albayraktaroglu, Manoj Franklin: Non-Inclusion Property in Multi-Level Caches Revisited. I. J. Comput. Appl. 14(2): 99-108 (2007) | |
| 2006 | ||
| 52 | Mohamed M. Zahran, Manoj Franklin: RHT: A Context-Based Return Address Predictor. CDES 2006: 17-23 | |
| 51 | Joonhyuk Yoo, Manoj Franklin: The Filter Checker: An Active Verification Management Approach. DFT 2006: 516-524 | |
| 50 | Sean Leventhal, Manoj Franklin: Perceptron Based Consumer Prediction in Shared-Memory Multiprocessors. ICCD 2006 | |
| 2005 | ||
| 49 | Michael David Black, Manoj Franklin: Neural Confidence Estimation for More Accurate Value Prediction. HiPC 2005: 376-385 | |
| 48 | Kursad Albayraktaroglu, Aamer Jaleel, Xue Wu, Manoj Franklin, Bruce L. Jacob, Chau-Wen Tseng, Donald Yeung: BioBench: A Benchmark Suite of Bioinformatics Applications. ISPASS 2005: 2-9 | |
| 47 | Aneesh Aggarwal, Manoj Franklin: Instruction Replication for Reducing Delays Due to Inter-PE Communication Latency. IEEE Trans. Computers 54(12): 1496-1507 (2005) | |
| 46 | Aneesh Aggarwal, Manoj Franklin: Scalability Aspects of Instruction Distribution Algorithms for Clustered Processors. IEEE Trans. Parallel Distrib. Syst. 16(10): 944-955 (2005) | |
| 2004 | ||
| 45 | Aneesh Aggarwal, Manoj Franklin, Oguz Ergin: Defining Wakeup Width for Efficient Dynamic Scheduling. ICCD 2004: 36-41 | |
| 44 | Anasua Bhowmik, Manoj Franklin: A General Compiler Framework for Speculative Multithreaded Processors. IEEE Trans. Parallel Distrib. Syst. 15(8): 713-724 (2004) | |
| 2003 | ||
| 43 | Aneesh Aggarwal, Manoj Franklin: Energy Efficient Asymmetrically Ported Register Files. ICCD 2003: 2-7 | |
| 42 | Mohamed M. Zahran, Manoj Franklin: Dynamic Thread Resizing for Speculative Multithreaded Processors. ICCD 2003: 313- | |
| 41 | Anasua Bhowmik, Manoj Franklin: A fast approximate interprocedural analysis for speculative multithreading compilers. ICS 2003: 32-41 | |
| 40 | Aneesh Aggarwal, Manoj Franklin: Instruction Replication: Reducing Delays Due to Inter-PE Communication Latency. IEEE PACT 2003: 46-55 | |
| 39 | Renju Thomas, Manoj Franklin, Chris Wilkerson, Jared Stark: Improving Branch Prediction by Dynamic Dataflow-Based Identification of Correlated Branches from a Large Global History. ISCA 2003: 314-323 | |
| 2002 | ||
| 38 | Krishnan Kailas, Manoj Franklin, Kemal Ebcioglu: A Register File Architecture and Compilation Scheme for Clustered ILP Processors. Euro-Par 2002: 500-511 | |
| 37 | Anasua Bhowmik, Manoj Franklin: Exploiting Data Value Prediction in Compiler Based Thread Formation. HiPC 2002: 506-518 | |
| 36 | Renju Thomas, Manoj Franklin: Using Dataflow Based Contextfor Accurate Branch Prediction. HiPC 2002: 587-596 | |
| 35 | Mohamed M. Zahran, Manoj Franklin: Return-Address Prediction in Speculative Multithreaded Environments. HiPC 2002: 609-619 | |
| 34 | Mohamed M. Zahran, Manoj Franklin: A Feasibility Study of Hierarchical Multithreading. IPDPS 2002 | |
| 33 | Aneesh Aggarwal, Manoj Franklin: Hierarchical Interconnects for On-Chip Clustering. IPDPS 2002 | |
| 32 | Anasua Bhowmik, Manoj Franklin: A general compiler framework for speculative multithreading. SPAA 2002: 99-108 | |
| 2001 | ||
| 31 | Aneesh Aggarwal, Manoj Franklin: Putting Data Value Predictors to Work in Fine-Grain Parallel Processors. HiPC 2001: 204-213 | |
| 30 | Renju Thomas, Manoj Franklin: Using Dataflow Based Context for Accurate Value Prediction. IEEE PACT 2001: 107-117 | |
| 29 | Kun Luo, Manoj Franklin, Shubhendu S. Mukherjee, André Seznec: Boosting SMT Performance by Speculation Control. IPDPS 2001: 2 | |
| 2000 | ||
| 28 | Jayanth Gummaraju, Manoj Franklin: Branch Prediction in Multi-Threaded Processors. IEEE PACT 2000: 179-188 | |
| 1999 | ||
| 27 | Wamsi Mohan, Manoj Franklin: Improving Data Value Prediction Accuracy Using Path Correlation. HiPC 1999: 28-32 | |
| 26 | Sreenivas Vadlapatla, Manoj Franklin: Performance Benefits of Exploiting Control Independence. HiPC 1999: 33-37 | |
| 25 | Simonjit Dutta, Manoj Franklin: Control Flow Prediction Schemes for Wide-Issue Superscalar Processors. IEEE Trans. Parallel Distrib. Syst. 10(4): 346-359 (1999) | |
| 1998 | ||
| 24 | Narayan Ranganathan, Manoj Franklin: An Empirical Study of Decentralized ILP Execution Models. ASPLOS 1998: 272-281 | |
| 1997 | ||
| 23 | Krishna K. Sundararaman, Manoj Franklin: Multiscalar Execution along a Single Flow of Control. ICPP 1997: 106-113 | |
| 22 | Kai Wang, Manoj Franklin: Highly Accurate Data Value Prediction Using Hybrid Predictors. MICRO 1997: 281-290 | |
| 1996 | ||
| 21 | Gregory A. Kemp, Manoj Franklin: PEWs: A Decentralized Dynamic Scheduler for ILP Processing. ICPP, Vol. 1 1996: 239-246 | |
| 20 | Manoj Franklin, Gurindar S. Sohi: ARB: A Hardware Mechanism for Dynamic Reordering of Memory References. IEEE Trans. Computers 45(5): 552-571 (1996) | |
| 19 | Manoj Franklin, Kewal K. Saluja: Testing reconfigured RAM's and scrambled address RAM's for pattern sensitive faults. IEEE Trans. on CAD of Integrated Circuits and Systems 15(9): 1081-1087 (1996) | |
| 1995 | ||
| 18 | Manoj Franklin: Fast computation of C-MISR signatures. Asian Test Symposium 1995: 293-297 | |
| 17 | Manoj Franklin: Incorporating Fault Tolerance in the Multiscalar Fine-Grain Parallel Processor. ICPP (1) 1995: 110-117 | |
| 16 | Mark Smotherman, Manoj Franklin: Improving CISC instruction decoding performance using a fill unit. MICRO 1995: 219-229 | |
| 15 | Simonjit Dutta, Manoj Franklin: Control flow prediction with tree-like subgraphs for superscalar processors. MICRO 1995: 258-263 | |
| 14 | Manoj Franklin, Kewal K. Saluja, Kyuchull Kim: Fast computation of MISR signatures. VLSI Design 1995: 414-418 | |
| 1994 | ||
| 13 | Manoj Franklin, Mark Smotherman: A fill-unit approach to multiple instruction issue. MICRO 1994: 162-171 | |
| 12 | Manoj Franklin, Kewal K. Saluja: An Algorithm to Test Reconfigured RAMs. VLSI Design 1994: 359-364 | |
| 11 | Manoj Franklin, Kewal K. Saluja: Hypergraph Coloring and Reconfigured RAM Testing. IEEE Trans. Computers 43(6): 725-736 (1994) | |
| 1993 | ||
| 10 | Dionisios N. Pnevmatikatos, Manoj Franklin, Gurindar S. Sohi: Control flow prediction for dynamic ILP processors. MICRO 1993: 153-163 | |
| 1992 | ||
| 9 | Manoj Franklin, Gurindar S. Sohi: The Expandable Split Window Paradigm for Exploiting Fine-Grain Parallelism. ISCA 1992: 58-67 | |
| 8 | Manoj Franklin, Gurindar S. Sohi: Register traffic analysis for streamlining inter-operation communication in fine-grain parallel processors. MICRO 1992: 236-245 | |
| 1991 | ||
| 7 | Gurindar S. Sohi, Manoj Franklin: High-Bandwidth Data Memory Systems for Superscalar Processors. ASPLOS 1991: 53-62 | |
| 6 | Manoj Franklin, Kewal K. Saluja: Pattern Sensitive Fault Testing of RAMs with Bullt-in ECC. FTCS 1991: 385-392 | |
| 5 | Manoj Franklin, Kewal K. Saluja: An Algorithm to Test Rams for Physical Neighborhood Pattern Sensitive Faults. ITC 1991: 675-684 | |
| 1990 | ||
| 4 | Manoj Franklin, Kewal K. Saluja: Built-in Self-testing of Random-Access Memories. IEEE Computer 23(10): 45-56 (1990) | |
| 1989 | ||
| 3 | Manoj Franklin, Kewal K. Saluja, Kozo Kinoshita: Row/column pattern sensitive fault detection in RAMs via built-in self-test. FTCS 1989: 36-43 | |
| 2 | Gurindar S. Sohi, Manoj Franklin, Kewal K. Saluja: A study of time-redundant fault tolerance techniques for high-performance pipelined computers. FTCS 1989: 436-443 | |
| 1 | Manoj Franklin, Kewal K. Saluja, Kozo Kinoshita: Design of a BIST RAM with Row/Column Pattern Sensitive Fault Detection Capability. ITC 1989: 327-336 | |
Colors in the list of coauthors
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