 | 2011 |
|---|
| 9 |       | Alexandro Sentinelli,
Tea Anselmo,
Pasqualina Fragneto,
Amit Kumar,
Beatrice Rossi:
Packetizing scalable streams in heterogenus peer-to-peer networks.
ICME 2011: 1-6 |
| 2008 |
|---|
| 8 | | Guido Marco Bertoni,
Luca Breveglieri,
Pasqualina Fragneto,
Gerardo Pelosi:
Parallel Hardware Architectures for the Cryptographic Tate Pairing.
I. J. Network Security 7(1): 31-37 (2008) |
| 7 | | Guido Bertoni,
Luca Breveglieri,
Liqun Chen,
Pasqualina Fragneto,
Keith A. Harrison,
Gerardo Pelosi:
A pairing SW implementation for Smart-Cards.
Journal of Systems and Software 81(7): 1240-1247 (2008) |
| 2006 |
|---|
| 6 | | Guido Bertoni,
Luca Breveglieri,
Pasqualina Fragneto,
Gerardo Pelosi,
L. Sportiello:
Software implementation of Tate pairing over GF(2m).
DATE Designers' Forum 2006: 7-11 |
| 5 | | Guido Bertoni,
Luca Breveglieri,
Pasqualina Fragneto,
Gerardo Pelosi:
Parallel Hardware Architectures for the Cryptographic Tate Pairing.
ITNG 2006: 186-191 |
| 2004 |
|---|
| 4 | | Guido Bertoni,
Marco Macchetti,
Luca Negri,
Pasqualina Fragneto:
Power-efficient ASIC synthesis of cryptographic sboxes.
ACM Great Lakes Symposium on VLSI 2004: 277-281 |
| 2003 |
|---|
| 3 | | Guido Bertoni,
A. Bircan,
Luca Breveglieri,
Pasqualina Fragneto,
Marco Macchetti,
Vittorio Zaccaria:
About the performances of the Advanced Encryption Standard in embedded systems with cache memory.
ISCAS (5) 2003: 145-148 |
| 2002 |
|---|
| 2 | | Guido Bertoni,
Luca Breveglieri,
Pasqualina Fragneto,
Marco Macchetti,
Stefano Marchesin:
Efficient Software Implementation of AES on 32-Bit Platforms.
CHES 2002: 159-171 |
| 2001 |
|---|
| 1 | | Guido Bertoni,
Luca Breveglieri,
Pasqualina Fragneto:
Efficient finite field digital-serial multiplier architecture for cryptography applications.
DATE 2001: 812 |
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