Martti Forsell

	2011
33		Ville Leppänen, Martti Penttonen, Martti Forsell: A layout for sparse cube-connected-cycles network. CompSysTech 2011: 32-37
32		Jari-Matti Mäkelä, Ville Leppänen, Martti Forsell: RISC-based moving threads multicore architecture. CompSysTech 2011: 51-56
31		Martti Forsell, Ville Leppänen, Martti Penttonen: Cost of Sparse Mesh Layouts Supporting Throughput Computing. DSD 2011: 316-323
30		Martti Forsell: A PRAM-NUMA Model of Computation for Addressing Low-TLP Workloads. IJNC 1(1): 21-35 (2011)
29		Martti Forsell: Performance comparison of some shared memory organizations for 2D mesh-like NOCs. Microprocessors and Microsystems - Embedded Hardware Design 35(2): 274-284 (2011)
28		Martti Forsell, Ville Leppänen: A moving threads processor architecture MTPA. The Journal of Supercomputing 57(1): 5-19 (2011)
	2010
27		Hai-Xiang Lin, Michael Alexander, Martti Forsell, Andreas Knüpfer, Radu Prodan, Leonel Sousa, Achim Streit: Euro-Par 2009 - Parallel Processing Workshops, HPPC, HeteroPar, PROPER, ROIA, UNICORE, VHPC, Delft, The Netherlands, August 25-28, 2009, Revised Selected Papers Springer 2010
26		Martti Forsell, Jesper Larsson Träff: HPPC 2010: Forth Workshop on Highly Parallel Processing on a Chip. Euro-Par Workshops 2010: 73-75
25		Martti Forsell, Jesper Larsson Träff: HPPC 2010: 5th Workshop on Highly Parallel Processing on a Chip. Euro-Par Workshops (1) 2010: 245-247
24		Martti Forsell: A PRAM-NUMA model of computation for addressing low-TLP workloads. IPDPS Workshops 2010: 1-8
23		Martti Forsell, Ville Leppänen: Supporting Concurrent Memory Access and Multioperations in Moving Threads CMPs. PDPTA 2010: 377-383
22		Ville Leppänen, Martti Penttonen, Martti Forsell: Layouts for Sparse Networks Supporting Throughput Computing. PDPTA 2010: 443-449
21		Martti Forsell: On the Performance and Cost of Some PRAM Models on CMP Hardware. Int. J. Found. Comput. Sci. 21(3): 387-404 (2010)
	2009
20		Jani Paakkulainen, Jari-Matti Mäkelä, Ville Leppänen, Martti Forsell: Outline of RISC-based core for multiprocessor on chip architecture supporting moving threads. CompSysTech 2009: 11
19		Martti Forsell, Jesper Larsson Träff: HPPC 2009: 3rd Workshop on Highly Parallel Processing on a Chip. Euro-Par Workshops 2009: 3-5
18		Martti Forsell, Peter Hofstee, Ahmed Jerraya, Chris R. Jesshope, Uzi Vishkin, Jesper Larsson Träff: HPPC 2009 Panel: Are Many-Core Computer Vendors on Track? Euro-Par Workshops 2009: 9-15
17		Martti Forsell: Configurable emulated shared memory architecture for general purpose MP-SOCs and NOC regions. NOCS 2009: 163-172
16		Martti Forsell, Ville Leppänen: MTPA - A Processor Architecture for MP-SOCs Employing the Moving Threads Paradigm. PDPTA 2009: 198-204
	2008
15		Luc Bougé, Martti Forsell, Jesper Larsson Träff, Achim Streit, Wolfgang Ziegler, Michael Alexander, Stephen Childs: Euro-Par 2007 Workshops: Parallel Processing, HPPC 2007, UNICORE Summit 2007, and VHPC 2007, Rennes, France, August 28-31, 2007, Revised Selected Papers Springer 2008
14		Martti Forsell, Jesper Larsson Träff: Second Workshop on Highly Parallel Processing on a Chip (HPPC 2008). Euro-Par Workshops 2008: 123-125
13		Martti Forsell: On the performance and cost of some PRAM models on CMP hardware. IPDPS 2008: 1-8
12		Martti Forsell, Jussi Roivainen: Performance, Area and Power Trade-Offs in Mesh-based Emulated Shared Memory CMP Architectures. PDPTA 2008: 471-477
	2007
11		Martti Forsell, Jesper Larsson Träff: HPPC 2007: Workshop on Highly Parallel Processing on a Chip. Euro-Par Workshops 2007: 3-4
10		Martti Forsell, Ville Leppänen: Moving Threads: A Non-Conventional Approach for Mapping Computation to MP-SOC. PDPTA 2007: 232-238
	2005
9		Martti Forsell: Realising constant time parallel algorithms with active memory modules. IJEB 3(3/4): 255-263 (2005)
	2003
8		Juha-Pekka Soininen, Axel Jantsch, Martti Forsell, Antti Pelkonen, Jari Kreku, Shashi Kumar: Extending Platform-Based Design to Network on Chip Systems. VLSI Design 2003: 401-
	2002
7		Juha-Pekka Soininen, Jari Kreku, Yang Qu, Martti Forsell: Fast processor core selection for WLAN modem using mappability estimation. CODES 2002: 61-66
6		Shashi Kumar, Axel Jantsch, Mikael Millberg, Johnny Öberg, Juha-Pekka Soininen, Martti Forsell, Kari Tiensyrjä, Ahmed Hemani: A Network on Chip Architecture and Design Methodology. ISVLSI 2002: 117-124
5		Martti Forsell: A Scalable High-Performance Computing Solution for Networks on Chips. IEEE Micro 22(5): 46-55 (2002)
4		Martti Forsell: Architectural differences of efficient sequential and parallel computers. Journal of Systems Architecture 47(13): 1017-1041 (2002)
3		Eugene I. Ageenko, Martti Forsell, Pasi Fränti: Context-based compression of binary images in parallel. Softw., Pract. Exper. 32(13): 1223-1237 (2002)
	1997
2		Martti Forsell: MTAC - A Multithreaded VLIW Architecture for PRAM Simulation. J. UCS 3(9): 1037-1055 (1997)
	1996
1		Martti Forsell, Martti Penttonen, Ville Leppänen: Efficient Two-Level Mesh based Simulation of PRAMs. ISPAN 1996: 29-35

Coauthor Index

1	Eugene I. Ageenko	[3]
2	Michael Alexander	[15] [27]
3	Luc Bougé	[15]
4	Stephen Childs	[15]
5	Pasi Fränti	[3]
6	Ahmed Hemani	[6]
7	Peter Hofstee	[18]
8	Axel Jantsch	[6] [8]
9	Ahmed Jerraya	[18]
10	Chris R. Jesshope	[18]
11	Andreas Knüpfer	[27]
12	Jari Kreku	[7] [8]
13	Shashi Kumar	[6] [8]
14	Ville Leppänen	[1] [10] [16] [20] [22] [23] [28] [31] [32] [33]
15	Hai-Xiang Lin	[27]
16	Jari-Matti Mäkelä	[20] [32]
17	Mikael Millberg	[6]
18	Johnny Öberg	[6]
19	Jani Paakkulainen	[20]
20	Antti Pelkonen	[8]
21	Martti Penttonen	[1] [22] [31] [33]
22	Radu Prodan	[27]
23	Yang Qu	[7]
24	Jussi Roivainen	[12]
25	Juha-Pekka Soininen	[6] [7] [8]
26	Leonel Sousa (Leonel Augusto Sousa)	[27]
27	Achim Streit	[15] [27]
28	Kari Tiensyrjä	[6]
29	Jesper Larsson Träff	[11] [14] [15] [18] [19] [25] [26]
30	Uzi Vishkin	[18]
31	Wolfgang Ziegler	[15]

Colors in the list of coauthors

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