 | 2012 |
| 69 |  | Simone Corbetta,
William Fornaciari:
NBTI mitigation in microprocessor designs.
ACM Great Lakes Symposium on VLSI 2012: 33-38 |
| 68 |  | Davide Zoni,
Patrick Bellasi,
William Fornaciari:
A Low-Overhead Heuristic for Mixed Workload Resource Partitioning in Cluster-Based Architectures.
ARCS 2012: 86-97 |
| 2011 |
| 67 |  | Mladen Berekovic,
William Fornaciari,
Uwe Brinkschulte,
Cristina Silvano:
Architecture of Computing Systems - ARCS 2011 - 24th International Conference, Como, Italy, February 24-25, 2011. Proceedings
Springer 2011 |
| 66 |  | Simone Corbetta,
William Fornaciari:
Estimation of thermal status in multi-core systems.
ISCAS 2011: 1660-1663 |
| 65 |  | Carlo Brandolese,
Simone Corbetta,
William Fornaciari:
Software energy estimation based on statistical characterization of intermediate compilation code.
ISLPED 2011: 333-338 |
| 64 |  | Cristina Silvano,
William Fornaciari,
Stefano Crespi-Reghizzi,
Giovanni Agosta,
Gianluca Palermo,
Vittorio Zaccaria,
Patrick Bellasi,
Fabrizio Castro,
Simone Corbetta,
Ettore Speziale,
Diego Melpignano,
J. M. Zins,
Heiko Hübert,
Benno Stabernack,
Jens Brandenburg,
Martin Palkovic,
Praveen Raghavan,
Chantal Ykman-Couvreur,
Iraklis Anagnostopoulos,
Alexandros Bartzas,
Dimitrios Soudris,
Torsten Kempf,
Gerd Ascheid,
Junaid Ansari,
Petri Mähönen,
Bart Vanthournout:
Invited paper: Parallel programming and run-time resource management framework for many-core platforms: The 2PARMA approach.
ReCoSoC 2011: 1-7 |
| 2010 |
| 63 |  | Patrick Bellasi,
William Fornaciari,
David Siorpaes:
A Hierarchical Distributed Control for Power and Performances Optimization of Embedded Systems.
ARCS 2010: 37-48 |
| 62 |  | Patrick Bellasi,
Stefano Bosisio,
Matteo Carnevali,
William Fornaciari,
David Siorpaes:
CPM: A Cross-Layer Framework to Efficiently Support Distributed Resources Management.
ARCS Workshops 2010: 293-298 |
| 61 |  | Patrick Bellasi,
Stefano Bosisio,
Matteo Carnevali,
William Fornaciari,
David Siorpaes:
Constrained Power Management: Application to a multimedia mobile platform.
DATE 2010: 989-992 |
| 60 |  | Patrick Bellasi,
Adnan Faisal,
William Fornaciari,
Giuseppe Serazzi:
Queueing Network Models for Performance Evaluation of ZigBee-Based WSNs.
EPEW 2010: 147-159 |
| 59 |  | Cristina Silvano,
William Fornaciari,
Gianluca Palermo,
Vittorio Zaccaria,
Fabrizio Castro,
Marcos Martínez,
Sara Bocchio,
Roberto Zafalon,
Prabhat Avasare,
Geert Vanmeerbeeck,
Chantal Ykman-Couvreur,
Maryse Wouters,
Carlos Kavka,
Luka Onesti,
Alessandro Turco,
Umberto Bondi,
Giovanni Mariani,
Hector Posadas,
Eugenio Villar,
Chris Wu,
Dongrui Fan,
Zhang Hao,
Shibin Tang:
MULTICUBE: Multi-objective Design Space Exploration of Multi-core Architectures.
ISVLSI 2010: 488-493 |
| 58 |  | Cristina Silvano,
William Fornaciari,
Stefano Crespi-Reghizzi,
Giovanni Agosta,
Gianluca Palermo,
Vittorio Zaccaria,
Patrick Bellasi,
Fabrizio Castro,
Simone Corbetta,
Andrea Di Biagio,
Ettore Speziale,
Michele Tartara,
David Siorpaes,
Heiko Hübert,
Benno Stabernack,
Jens Brandenburg,
Martin Palkovic,
Praveen Raghavan,
Chantal Ykman-Couvreur,
Alexandros Bartzas,
Sotirios Xydis,
Dimitrios Soudris,
Torsten Kempf,
Gerd Ascheid,
Rainer Leupers,
Heinrich Meyr,
Junaid Ansari,
Petri Mähönen,
Bart Vanthournout:
2PARMA: Parallel Paradigms and Run-Time Management Techniques for Many-Core Architectures.
ISVLSI 2010: 494-499 |
| 2009 |
| 57 |  | Patrick Bellasi,
William Fornaciari,
David Siorpaes:
Predictive models for multimedia applications power consumption based on use-case and OS level analysis.
DATE 2009: 1446-1451 |
| 56 |  | Carlo Brandolese,
William Fornaciari:
A Framework for Compile-time and Run-time Management of Non-functional Aspects in WSNs Nodes.
DSD 2009: 857-864 |
| 2008 |
| 55 |  | Carlo Brandolese,
William Fornaciari:
Measurement, Analysis and Modeling of RTOS System Calls Timing.
DSD 2008: 618-625 |
| 54 |  | Simone Campanoni,
William Fornaciari:
Models and Tradeoffs in WSN System-Level Design.
DSD 2008: 676-684 |
| 2006 |
| 53 |  | Carlo Brandolese,
William Fornaciari,
Luigi Pomante,
Fabio Salice,
Donatella Sciuto:
Affinity-Driven System Design Exploration for Heterogeneous Multiprocessor SoC.
IEEE Trans. Computers 55(5): 508-519 (2006) |
| 2005 |
| 52 |  | Domenico Barretta,
William Fornaciari,
Mariagiovanna Sami,
Daniele Bagni:
Multithreaded Extension to Multicluster VLIW Processors for Embedded Applications.
DATE 2005: 748-749 |
| 2004 |
| 51 |  | Luca Negri,
Domenico Barretta,
William Fornaciari:
Application-level power management in pervasive computing systems: a case study.
Conf. Computing Frontiers 2004: 78-88 |
| 50 |  | Carlo Brandolese,
William Fornaciari,
Fabio Salice:
An area estimation methodology for FPGA based designs at systemc-level.
DAC 2004: 129-132 |
| 49 |  | Carlo Brandolese,
William Fornaciari,
Fabio Salice,
Donatella Sciuto:
Analysis and Modeling of Energy Reducing Source Code Transformations.
DATE 2004: 306-311 |
| 48 |  | Carlo Brandolese,
William Fornaciari,
Fabio Salice:
Discrete-Event Modeling and Simulation of Superscalar Microprocessor Architectures.
PATMOS 2004: 238-247 |
| 2003 |
| 47 |  | William Fornaciari,
Fabio Salice,
Daniele Paolo Scarpazza:
Early estimation of the size of VHDL projects.
CODES+ISSS 2003: 207-212 |
| 46 |  | William Fornaciari,
P. Micheli,
Fabio Salice,
L. Zampella:
A First Step Towards Hw/Sw Partitioning of UML Specifications.
DATE 2003: 10668-10673 |
| 45 |  | Carlo Brandolese,
William Fornaciari,
Fabio Salice,
Donatella Sciuto:
Library Functions Timing Characterization for Source-Level Analysis.
DATE 2003: 11132-11133 |
| 44 |  | Fabio Salice,
William Fornaciari,
Luigi Pomante,
Donatella Sciuto:
An Internal Representation Model for System-Level Co-Design of Heterogeneous Multiprocessor Embedded System.
FDL 2003: 669-680 |
| 43 |  | Fabio Salice,
William Fornaciari,
Luca Del Vecchio,
Luigi Pomante:
Partitioning of Embedded Applications onto Heterogeneous Multiprocessor Architectures.
SAC 2003: 661-665 |
| 2002 |
| 42 |  | Donatella Sciuto,
Fabio Salice,
Luigi Pomante,
William Fornaciari:
Metrics for design space exploration of heterogeneous multiprocessor embedded systems.
CODES 2002: 55-60 |
| 41 |  | Domenico Barretta,
William Fornaciari,
Mariagiovanna Sami,
Danilo Pau:
SIMD Extension to VLIW Multicluster Processors for Embedded Applications.
ICCD 2002: 523-526 |
| 40 |  | William Fornaciari,
Vito Trianni,
Carlo Brandolese,
Donatella Sciuto,
Fabio Salice,
Giovanni Beltrame:
Modeling Assembly Instruction Timing in Superscalar Architectures.
ISSS 2002: 132-137 |
| 39 |  | William Fornaciari,
Donatella Sciuto,
Cristina Silvano,
Vittorio Zaccaria:
A Sensitivity-Based Design Space Exploration Methodology for Embedded Systems.
Design Autom. for Emb. Sys. 7(1-2): 7-33 (2002) |
| 38 |  | Carlo Brandolese,
Fabio Salice,
William Fornaciari,
Donatella Sciuto:
Static power modeling of 32-bit microprocessors.
IEEE Trans. on CAD of Integrated Circuits and Systems 21(11): 1306-1316 (2002) |
| 37 |  | Carlo Brandolese,
William Fornaciari,
Fabio Salice,
Donatella Sciuto:
The Impact of Source Code Transformations on Software Power and Energy Consumption.
Journal of Circuits, Systems, and Computers 11(5): 477-502 (2002) |
| 2001 |
| 36 |  | William Fornaciari,
Donatella Sciuto,
Cristina Silvano,
Vittorio Zaccaria:
A design framework to efficiently explore energy-delay tradeoffs.
CODES 2001: 260-265 |
| 35 |  | William Fornaciari,
Fabio Salice,
Umberto Bondi,
Edi Magini:
Development cost and size estimation starting from high-level specifications.
CODES 2001: 86-91 |
| 34 |  | Carlo Brandolese,
William Fornaciari,
Fabio Salice,
Donatella Sciuto:
Source-level execution time estimation of C programs.
CODES 2001: 98-103 |
| 33 |  | Giovanni Beltrame,
Carlo Brandolese,
William Fornaciari,
Fabio Salice,
Donatella Sciuto,
Vito Trianni:
An Assembly-Level Execution-Time Model for Pipelined Architectures.
ICCAD 2001: 195-200 |
| 32 |  | Cesare Alippi,
William Fornaciari,
Laura Pozzi,
Mariagiovanna Sami:
Determining the Optimum Extended Instruction-Set Architecture for Application Specific Reconfigurable VLIW CPUs.
IEEE International Workshop on Rapid System Prototyping 2001: 50-57 |
| 31 |  | William Fornaciari,
Donatella Sciuto,
Cristina Silvano,
Vittorio Zaccaria:
Fast system-level exploration of memory architectures driven by energy-delay metrics.
ISCAS (4) 2001: 502-505 |
| 30 |  | Giovanni Beltrame,
Carlo Brandolese,
William Fornaciari,
Fabio Salice,
Donatella Sciuto,
Vito Trianni:
Dynamic modeling of inter-instruction effects for execution time estimation.
ISSS 2001: 136-141 |
| 29 |  | William Fornaciari,
Vincenzo Piuri,
Andrea Prestileo,
Vittorio Zaccaria:
An Agent-Based Approach to Full Interoperability and Allocation Transparency in Distributed File Systems.
MATA 2001: 153-162 |
| 2000 |
| 28 |  | Carlo Brandolese,
William Fornaciari,
Fabio Salice,
Donatella Sciuto:
Energy estimation for 32-bit microprocessors.
CODES 2000: 24-28 |
| 27 |  | William Fornaciari,
M. Polentarutti,
Donatella Sciuto,
Cristina Silvano:
Power optimization of system-level address buses based on software profiling.
CODES 2000: 29-33 |
| 26 |  | Carlo Brandolese,
William Fornaciari,
Fabio Salice,
Donatella Sciuto:
An instruction-level functionally-based energy estimation model for 32-bits microprocessors.
DAC 2000: 346-351 |
| 25 |  | Cesare Alippi,
William Fornaciari,
Laura Pozzi,
Mariagiovanna Sami:
Determining the optimum extended instruction-set architecture for application specific reconfigurable VLIW CPUs (poster abstract).
FPGA 2000: 218 |
| 24 |  | William Fornaciari,
Vincenzo Piuri,
Luigi Ripamonti:
Virtualization of FPGA via segmentation (poster abstract).
FPGA 2000: 222 |
| 23 |  | Carlo Brandolese,
William Fornaciari,
Luigi Pomante,
Fabio Salice,
Donatella Sciuto:
A Multi-Level Strategy for Software Power Estimation.
ISSS 2000: 187-192 |
| 22 |  | Alberto Allara,
Massimo Bombana,
William Fornaciari,
Fabio Salice:
A Case Study in Design Space Exploration: The Tosca Environment Applied to a Telecommunication Link Controller.
IEEE Design & Test of Computers 17(2): 60-72 (2000) |
| 1999 |
| 21 |  | William Fornaciari,
Donatella Sciuto:
HW/SW Co-design of Embedded Systems.
Ada-Europe 1999: 344-355 |
| 20 |  | William Fornaciari,
Donatella Sciuto,
Cristina Silvano:
Power estimation for architectural exploration of HW/SW communication on system-level buses.
CODES 1999: 152-156 |
| 19 |  | William Fornaciari,
Donatella Sciuto,
Cristina Silvano:
Influence of Caching and Encoding on Power Dissipation of System-Level Buses for Embedded Systems.
DATE 1999: 762-763 |
| 18 |  | Cesare Alippi,
William Fornaciari,
Laura Pozzi,
Mariagiovanna Sami:
A DAG-Based Design Approach for Reconfigurable VLIW Processors.
DATE 1999: 778-779 |
| 17 |  | William Fornaciari,
Donatella Sciuto,
Cristina Silvano:
Power Estimation of System-Level Buses for Microprocessor-Based Architectures: A Case Study.
ICCD 1999: 131- |
| 1998 |
| 16 |  | Alberto Allara,
William Fornaciari,
Fabio Salice,
Donatella Sciuto:
A Model for System-Level Timed Analysis and Profiling.
DATE 1998: 204-210 |
| 15 |  | William Fornaciari,
Vincenzo Piuri:
Virtual FPGAs: Some Steps Behind the Physical Barriers.
IPPS/SPDP Workshops 1998: 7-12 |
| 14 |  | Cristiana Bolchini,
William Fornaciari,
Fabio Salice,
Donatella Sciuto:
Concurrent Error Detection at Architectural Level.
ISSS 1998: 72-75 |
| 13 |  | William Fornaciari,
Paolo Gubian,
Donatella Sciuto,
Cristina Silvano:
Power estimation of embedded systems: a hardware/software codesign approach.
IEEE Trans. VLSI Syst. 6(2): 266-275 (1998) |
| 1997 |
| 12 |  | Alberto Allara,
S. Filipponi,
Fabio Salice,
William Fornaciari,
Donatella Sciuto:
A Flexible Model for Evaluating the Behavior of Hardware/Software Systems.
CODES 1997: 109-114 |
| 11 |  | Alberto Allara,
S. Filipponi,
William Fornaciari,
Fabio Salice,
Donatella Sciuto:
Improving Design Turnaround Time via Two-Levels Hw/Sw Co-Simulation.
ICCD 1997: 400-405 |
| 10 |  | William Fornaciari,
Donatella Sciuto:
A Two-Level Cosimulation Environment.
IEEE Computer 30(6): 109-111 (1997) |
| 9 |  | William Fornaciari,
Paolo Gubian,
Donatella Sciuto,
Cristina Silvano:
A VHDL-based approach for power estimation of embedded systems.
Journal of Systems Architecture 44(1): 37-61 (1997) |
| 1996 |
| 8 |  | Alessandro Balboni,
William Fornaciari,
Donatella Sciuto:
Partitioning and Exploration Strategies in the TOSCA Co-Design Flow.
CODES 1996: 62-69 |
| 7 |  | Alessandro Balboni,
William Fornaciari,
M. Vincenzi,
Donatella Sciuto:
The Use of a Virtual Instruction Set for the Software Synthesis of HW/SW Embedded Systems.
ISSS 1996: 77-82 |
| 6 |  | Alessandro Balboni,
William Fornaciari,
Donatella Sciuto:
Co-synthesis and co-simulation of control-dominated embedded systems.
Design Autom. for Emb. Sys. 1(3): 257-289 (1996) |
| 1995 |
| 5 |  | William Fornaciari,
Fabio Salice:
A new architecture for the automatic design of custom digital neural network.
IEEE Trans. VLSI Syst. 3(4): 502-506 (1995) |
| 1994 |
| 4 |  | Stefano Antoniazzi,
Alessandro Balboni,
William Fornaciari,
Donatella Sciuto:
A methodology for control-dominated systems codesign.
CODES 1994: 2-9 |
| 3 |  | Donatella Sciuto,
Stefano Antoniazzi,
Alessandro Balboni,
William Fornaciari:
The role of VHDL within the TOSCA hardware/software codesign framework.
EURO-DAC 1994: 612-617 |
| 2 |  | Stefano Antoniazzi,
Alessandro Balboni,
William Fornaciari,
Donatella Sciuto:
HW/SW Codesign for Embedded Telecom Systems.
ICCD 1994: 278-281 |
| 1993 |
| 1 |  | Stefano Antoniazzi,
Alessandro Balboni,
William Fornaciari:
X-Nets: A visual formalism for system specification and analysis.
Microprocessing and Microprogramming 38(1-5): 71-78 (1993) |