Pierfrancesco Foglia

	2012
36		Massimiliano Annoni, Alessandro Bardine, Stefano Campanelli, Pierfrancesco Foglia, Cosimo Antonio Prete: A real-time configurable NURBS interpolator with bounded acceleration, jerk and chord error. Computer-Aided Design 44(6): 509-521 (2012)
	2011
35		Alessandro Bardine, Pierfrancesco Foglia, Francesco Panicucci, Marco Solinas, Julio Sahuquillo: Energy Behaviour of NUCA Caches in CMPs. DSD 2011: 746-753
34		Alessandro Bardine, Pierfrancesco Foglia, Cosimo Antonio Prete, Marco Solinas: NUMA Caches. Encyclopedia of Parallel Computing 2011: 1329-1338
33		Sandro Bartolini, Pierfrancesco Foglia, Cosimo Antonio Prete: Eighth MEDEA Workshop. T. HiPEAC 3: 91-92 (2011)
	2010
32		Yale N. Patt, Pierfrancesco Foglia, Evelyn Duesterwald, Paolo Faraboschi, Xavier Martorell: High Performance Embedded Architectures and Compilers, 5th International Conference, HiPEAC 2010, Pisa, Italy, January 25-27, 2010. Proceedings Springer 2010
31		Pierfrancesco Foglia, Cosimo Antonio Prete, Marco Solinas, Giovanna Monni: Re-NUCA: Boosting CMP Performance Through Block Replication. DSD 2010: 199-206
30		Alessandro Bardine, Stefano Campanelli, Pierfrancesco Foglia, Cosimo Antonio Prete: NURBS interpolator with confined chord error and tangential and centripetal acceleration control. ICUMT 2010: 489-496
29		Sandro Bartolini, Pierfrancesco Foglia, Marco Solinas, Cosimo Antonio Prete: Feedback-Driven Restructuring of Multi-threaded Applications for NUCA Cache Performance in CMPs. SBAC-PAD 2010: 87-94
28		Alessandro Bardine, Manuel Comparetti, Pierfrancesco Foglia, Giacomo Gabrielli, Cosimo Antonio Prete: Way adaptable D-NUCA caches. IJHPSA 2(3/4): 215-228 (2010)
	2009
27		Alessandro Bardine, Manuel Comparetti, Pierfrancesco Foglia, Giacomo Gabrielli, Cosimo Antonio Prete: A power-efficient migration mechanism for D-NUCA caches. DATE 2009: 598-601
26		Pierfrancesco Foglia, Francesco Panicucci, Cosimo Antonio Prete, Marco Solinas: An Evaluation of Behaviors of S-NUCA CMPs Running Scientific Workload. DSD 2009: 26-33
25		Pierfrancesco Foglia, Francesco Panicucci, Cosimo Antonio Prete, Marco Solinas: Analysis of Performance Dependencies in NUCA-Based CMP Systems. SBAC-PAD 2009: 49-56
24		Alessandro Bardine, Manuel Comparetti, Pierfrancesco Foglia, Giacomo Gabrielli, Cosimo Antonio Prete: Impact of on-chip network parameters on nuca cache performances. IET Computers & Digital Techniques 3(5): 501-512 (2009)
	2008
23		Alessandro Bardine, Manuel Comparetti, Pierfrancesco Foglia, Giacomo Gabrielli, Cosimo Antonio Prete, Per Stenström: Leveraging Data Promotion for Low Power D-NUCA Caches. DSD 2008: 307-316
22		Alessandro Bardine, Manuel Comparetti, Pierfrancesco Foglia, Giacomo Gabrielli, Cosimo Antonio Prete: Performance Sensitivity of NUCA Caches to On-Chip Network Parameters. SBAC-PAD 2008: 167-174
	2007
21		Afrin Naz, Krishna M. Kavi, Jung-Hwan Oh, Pierfrancesco Foglia: Reconfigurable split data caches: a novel scheme for embedded systems. SAC 2007: 707-712
20		Pierfrancesco Foglia, Cosimo Antonio Prete, Michele Zanda: Modelling Public Administration Portals. Encyclopedia of Portal Technologies and Applications 2007: 606-614
19		Pierfrancesco Foglia, F. Giuntoli, Cosimo Antonio Prete, Michele Zanda: Assisting e-government users with animated talking faces. Interactions 14(1): 24-26 (2007)
18		Sandro Bartolini, Pierfrancesco Foglia, Cosimo Antonio Prete: MEmory performance: DEaling with applications, systems and architecture. SIGARCH Computer Architecture News 35(4): 4-5 (2007)
17		Alessandro Bardine, Pierfrancesco Foglia, Giacomo Gabrielli, Cosimo Antonio Prete, Per Stenström: Improving power efficiency of D-NUCA caches. SIGARCH Computer Architecture News 35(4): 53-58 (2007)
	2006
16		Sandro Bartolini, Pierfrancesco Foglia, Cosimo Antonio Prete: Embedded processors and systems: Architectural issues and solutions for emerging applications. J. Embedded Computing 2(1): 1-3 (2006)
15		Sandro Bartolini, Pierfrancesco Foglia, Roberto Giorgi, Cosimo Antonio Prete: Memory performance: dealing with applications, systems and architecture. SIGARCH Computer Architecture News 34(1): 1-2 (2006)
14		Alessandro Bardine, Alessio Bechini, Pierfrancesco Foglia, Cosimo Antonio Prete: Analysis of embedded video coder systems: a system-level approach. SIGARCH Computer Architecture News 34(1): 71-76 (2006)
	2005
13		Pierfrancesco Foglia, Daniele Mangano, Cosimo Antonio Prete: A NUCA Model for Embedded Systems Cache Design. ESTImedia 2005: 41-46
12		Cosimo Antonio Prete, Pierfrancesco Foglia, Michele Zanda: An Innovative Tool to Easily Get Usable Web Sites. WEBIST 2005: 373-376
11		Pierfrancesco Foglia, Daniele Mangano, Cosimo Antonio Prete: A cache design for high performance embedded systems. J. Embedded Computing 1(4): 587-597 (2005)
10		Pierfrancesco Foglia, Roberto Giorgi, Cosimo Antonio Prete: Reducing coherence overhead and boosting performance of high-end SMP multiprocessors running a DSS workload. J. Parallel Distrib. Comput. 65(3): 289-306 (2005)
9		Sandro Bartolini, Pierfrancesco Foglia, Cosimo Antonio Prete: Guests editor's introduction. SIGARCH Computer Architecture News 33(3): 1-2 (2005)
	2004
8		Pierfrancesco Foglia, Roberto Giorgi, Cosimo Antonio Prete: Speeding-up multiprocessors running DBMS workloads through coherence protocols. IJHPCN 1(1/2/3): 17-32 (2004)
	2003
7		Alessio Bechini, Pierfrancesco Foglia, Cosimo Antonio Prete: Fine-grain design space exploration for a cartographic SoC multiprocessor. SIGARCH Computer Architecture News 31(1): 85-92 (2003)
	2002
6		Pierfrancesco Foglia, Roberto Giorgi, Cosimo Antonio Prete: Boosting the Performance of Three-Tier Web Servers Deploying SMP Architecture. NETWORKING Workshops 2002: 134-146
5		Alessio Bechini, Pierfrancesco Foglia, Cosimo Antonio Prete: Use of a CORBA/RMI gateway: characterization of communication overhead. Workshop on Software and Performance 2002: 150-156
	2001
4		Pierfrancesco Foglia, Roberto Giorgi, Cosimo Antonio Prete: Evaluating Optimizing for Multiprocessors E-Commerce Server Running TPC-W Workload. HICSS 2001
	2000
3		Pierfrancesco Foglia, Roberto Giorgi, Cosimo Antonio Prete: Performance Analysis of Electronic Commerce Multiprocessor Server. HICSS 2000
	1999
2		Pierfrancesco Foglia, Roberto Giorgi, Cosimo Antonio Prete: Process Migration Effects on Memory Performance of Multiprocessor. HiPC 1999: 133-142
	1998
1		Giuseppe Anastasi, Pierfrancesco Foglia, Luciano Lenzini: MPEG video traffic on a MetaRing network: complexity reduction of a 'worst-case' model for bandwidth allocation analysis. Computer Communications 21(2): 111-125 (1998)

Coauthor Index

1	Giuseppe Anastasi	[1]
2	Massimiliano Annoni	[36]
3	Alessandro Bardine	[14] [17] [22] [23] [24] [27] [28] [30] [34] [35] [36]
4	Sandro Bartolini	[9] [15] [16] [18] [29] [33]
5	Alessio Bechini	[5] [7] [14]
6	Stefano Campanelli	[30] [36]
7	Manuel Comparetti	[22] [23] [24] [27] [28]
8	Evelyn Duesterwald	[32]
9	Paolo Faraboschi	[32]
10	Giacomo Gabrielli	[17] [22] [23] [24] [27] [28]
11	Roberto Giorgi	[2] [3] [4] [6] [8] [10] [15]
12	F. Giuntoli	[19]
13	Krishna M. Kavi	[21]
14	Luciano Lenzini	[1]
15	Daniele Mangano	[11] [13]
16	Xavier Martorell	[32]
17	Giovanna Monni	[31]
18	Afrin Naz	[21]
19	Jung-Hwan Oh	[21]
20	Francesco Panicucci	[25] [26] [35]
21	Yale N. Patt	[32]
22	Cosimo Antonio Prete	[2] [3] [4] [5] [6] [7] [8] [9] [10] [11] [12] [13] [14] [15] [16] [17] [18] [19] [20] [22] [23] [24] [25] [26] [27] [28] [29] [30] [31] [33] [34] [36]
23	Julio Sahuquillo (Julio Sahuquillo Borrás)	[35]
24	Marco Solinas	[25] [26] [29] [31] [34] [35]
25	Per Stenström	[17] [23]
26	Michele Zanda	[12] [19] [20]

Colors in the list of coauthors

Last update Wed May 30 22:34:44 2012 CET by the DBLP Team — Data released under the ODC-BY 1.0 license — See also our legal information page