Marie-Lise Flottes

	2012
51		Jean DaRolt, Amitabh Das, Giorgio Di Natale, Marie-Lise Flottes, Bruno Rouzeyre, Ingrid Verbauwhede: A New Scan Attack on RSA in Presence of Industrial Countermeasures. COSADE 2012: 89-104
	2011
50		Giorgio Di Natale, Marie-Lise Flottes, Bruno Rouzeyre, Miroslav Valka, Denis Réal: Power consumption traces realignment to improve differential power analysis. DDECS 2011: 201-206
49		Rodrigo P. Bastos, Giorgio Di Natale, Marie-Lise Flottes, Bruno Rouzeyre: A New Bulk Built-In Current Sensor-Based Strategy for Dealing with Long-Duration Transient Faults in Deep-Submicron Technologies. DFT 2011: 302-308
48		Jean DaRolt, Giorgio Di Natale, Marie-Lise Flottes, Bruno Rouzeyre: Scan Attacks and Countermeasures in Presence of Scan Response Compactors. European Test Symposium 2011: 19-24
47		Jean DaRolt, Giorgio Di Natale, Marie-Lise Flottes, Bruno Rouzeyre: New security threats against chips containing scan chain structures. HOST 2011: 110
	2010
46		Giorgio Di Natale, Marie-Lise Flottes, Bruno Rouzeyre: Ensuring high testability without degrading security: Embedded tutorial on "test and security". DDECS 2010: 6
45		Giorgio Di Natale, Marie-Lise Flottes, Bruno Rouzeyre: Evaluation of Resistance to Differential Power Analysis: Execution Time Optimizations for Designers. DELTA 2010: 256-261
44		K. Bousselam, Giorgio Di Natale, Marie-Lise Flottes, Bruno Rouzeyre: Evaluation of concurrent error detection techniques on the Advanced Encryption Standard. European Test Symposium 2010: 252
43		K. Bousselam, Giorgio Di Natale, Marie-Lise Flottes, Bruno Rouzeyre: Evaluation of concurrent error detection techniques on the advanced encryption standard. IOLTS 2010: 223-228
42		Giorgio Di Natale, M. Doulcier, Marie-Lise Flottes, Bruno Rouzeyre: Self-Test Techniques for Crypto-Devices. IEEE Trans. VLSI Syst. 18(2): 329-333 (2010)
	2009
41		Giorgio Di Natale, M. Doulcier, Marie-Lise Flottes, Bruno Rouzeyre: A Reliable Architecture for Parallel Implementations of the Advanced Encryption Standard. J. Electronic Testing 25(4-5): 269-278 (2009)
40		Beatrice Pradarelli, Laurent Latorre, Marie-Lise Flottes, Yves Bertrand, Pascal Nouet: Remote Labs for Industrial IC Testing. TLT 2(4): 304-311 (2009)
	2008
39		M. Doulcier, Marie-Lise Flottes, Bruno Rouzeyre: AES-Based BIST: Self-Test, Test Pattern Generation and Signature Analysis. DELTA 2008: 314-321
38		Giorgio Di Natale, Marie-Lise Flottes, Bruno Rouzeyre: An Integrated Validation Environment for Differential Power Analysis. DELTA 2008: 527-532
37		Giorgio Di Natale, M. Doulcier, Marie-Lise Flottes, Bruno Rouzeyre: A Reliable Architecture for the Advanced Encryption Standard. European Test Symposium 2008: 13-18
36		Julien Dalmasso, Érika F. Cota, Marie-Lise Flottes, Bruno Rouzeyre: Improving the Test of NoC-Based SoCs with Help of Compression Schemes. ISVLSI 2008: 139-144
35		Ziad Noun, Philippe Cauvet, Marie-Lise Flottes, David Andreu, Serge Bernard: Wireless Test Structure for Integrated Systems. ITC 2008: 1
	2007
34		Giorgio Di Natale, Marie-Lise Flottes, Bruno Rouzeyre: A Novel Parity Bit Scheme for SBox in AES Circuits. DDECS 2007: 267-271
33		Giorgio Di Natale, Marie-Lise Flottes, Bruno Rouzeyre: An On-Line Fault Detection Scheme for SBoxes in Secure Circuits. IOLTS 2007: 57-62
32		Giorgio Di Natale, Marie-Lise Flottes, Bruno Rouzeyre: A Dependable Parallel Architecture for SBoxes. ReCoSoC 2007: 132-137
31		Julien Dalmasso, Marie-Lise Flottes, Bruno Rouzeyre: Test data compression and TAM design. VLSI-SoC 2007: 178-183
30		Mathieu Scholivé, Vincent Beroulle, Chantal Robach, Marie-Lise Flottes, Bruno Rouzeyre: Mutation Sampling Technique for the Generation of Structural Test Data CoRR abs/0710.4802: (2007)
29		David Hély, Frédéric Bancel, Marie-Lise Flottes, Bruno Rouzeyre: Securing Scan Control in Crypto Chips. J. Electronic Testing 23(5): 457-464 (2007)
	2006
28		David Hély, Frédéric Bancel, Marie-Lise Flottes, Bruno Rouzeyre: A secure scan design methodology. DATE 2006: 1177-1178
27		Julien Dalmasso, Marie-Lise Flottes, Bruno Rouzeyre: Fitting ATE Channels with Scan Chains: a Comparison between a Test Data Compression Technique and Serial Loading of Scan Chains. DELTA 2006: 295-300
26		David Hély, Frédéric Bancel, Marie-Lise Flottes, Bruno Rouzeyre: Secure Scan Techniques: A Comparison. IOLTS 2006: 119-124
	2005
25		Mathieu Scholivé, Vincent Beroulle, Chantal Robach, Marie-Lise Flottes, Bruno Rouzeyre: Mutation Sampling Technique for the Generation of Structural Test Data. DATE 2005: 1022-1023
	2004
24		Marie-Lise Flottes, Regis Poirier, Bruno Rouzeyre: An Arithmetic Structure for Test Data Horizontal Compression. DATE 2004: 428-435
23		Marie-Lise Flottes, Yves Bertrand, L. Balado, Emili Lupon, Anton Biasizzo, Franc Novak, Stefano Di Carlo, Paolo Prinetto, N. Pricopi, Hans-Joachim Wunderlich: Digital, Memory and Mixed-Signal Test Engineering Education: Five Centres of Competence in Europ. DELTA 2004: 135-139
22		Marie-Lise Flottes, Regis Poirier, Bruno Rouzeyre: On Using Test Vector Differences for Reducing Test Pin Numbers. DELTA 2004: 275-280
21		David Hély, Marie-Lise Flottes, Frédéric Bancel, Bruno Rouzeyre, Nicolas Bérard, Michel Renovell: Scan Design and Secure Chip. IOLTS 2004: 219-226
	2003
20		Yves Bertrand, Marie-Lise Flottes, L. Balado, Joan Figueras, Anton Biasizzo, Franc Novak, Stefano Di Carlo, Paolo Prinetto, N. Pricopi, Hans-Joachim Wunderlich, J.-P. Van der Heyden: Test Engineering Education in Europe: the EuNICE-Test Project. MSE 2003: 85-86
19		Marie-Lise Flottes, Christian Landrault, A. Petitqueux: A Unified DFT Approach for BIST and External Test. J. Electronic Testing 19(1): 49-60 (2003)
	2002
18		Michel Robert, Bruno Rouzeyre, Christian Piguet, Marie-Lise Flottes: SOC Design Methodologies, IFIP TC10/WG10.5 Eleventh International Conference on Very Large Scale Integration of Systems-on/Chip (VLSI-SOC'01), December 3-5, 2001, Montpellier, France Kluwer 2002
17		Marie-Lise Flottes, Julien Pouget, Bruno Rouzeyre: A Heuristic for Test Scheduling at System Level. DATE 2002: 1124
16		Yves Bertrand, Marie-Lise Flottes, Florence Azaïs, Serge Bernard, Laurent Latorre, Regis Lorival: European Network for Test Education. DELTA 2002: 230-234
	2001
15		Marie-Lise Flottes, Julien Pouget, Bruno Rouzeyre: Power-Constrained Test Scheduling for SoCs Under a "no session" Scheme. VLSI-SOC 2001: 401-412
14		David Berthelot, Marie-Lise Flottes, Bruno Rouzeyre: A Method for Trading off Test Time, Area and Fault Coverage in Datapath BIST Synthesis. J. Electronic Testing 17(3-4): 331-339 (2001)
	2000
13		Marie-Lise Flottes, Christian Landrault, A. Petitqueux: Design for sequential testability: an internal state reseeding approach for 100 % fault coverage. Asian Test Symposium 2000: 404-
12		David Berthelot, Marie-Lise Flottes, Bruno Rouzeyre: BISTing data paths at behavioral level. ITC 2000: 672-680
	1999
11		Yves Bertrand, Florence Azaïs, Marie-Lise Flottes, Regis Lorival: A Successful Distance-Learning Experience for IC Test Education. MSE 1999: 20-21
10		David Berthelot, Marie-Lise Flottes, Bruno Rouzeyre: BISTing Datapaths under Heterogeneous Test Schemes. J. Electronic Testing 14(1-2): 115-123 (1999)
	1998
9		Marie-Lise Flottes, R. Pires, Bruno Rouzeyre: Alleviating DFT Cost Using Testability Driven HLS. Asian Test Symposium 1998: 46-51
8		Marie-Lise Flottes, R. Pires, Bruno Rouzeyre, L. Volpe: Scanning Datapaths: A Fast and Effective Partial Scan Selection Technique. DATE 1998: 921-922
7		Marie-Lise Flottes, R. Pires, Bruno Rouzeyre, L. Volpe: Low Cost Partial Scan Design: A High Level Synthesis Approach. VTS 1998: 332-340
	1997
6		Marie-Lise Flottes, R. Pires, Bruno Rouzeyre: Analyzing testability from behavioral to RT level. ED&TC 1997: 158-165
5		Marie-Lise Flottes, D. Hammad, Bruno Rouzeyre: Improving Testability of Non-Scan Designs during Behavioral Synthesis. J. Electronic Testing 11(1): 29-42 (1997)
	1995
4		Christian Landrault, Marie-Lise Flottes, Bruno Rouzeyre: Is High-Level Test Synthesis Just Design for Test? ITC 1995: 294
	1994
3		Marie-Lise Flottes, D. Hammad, Bruno Rouzeyre: Automatic Synthesis of BISTed Data Paths From High Level Specification. EDAC-ETC-EUROASIC 1994: 591-598
	1991
2		Marie-Lise Flottes, Christian Landrault, Serge Pravossoudovitch: Fault modeling and fault equivalence in CMOS technology. J. Electronic Testing 2(3): 229-241 (1991)
	1990
1		Marie-Lise Flottes, Christian Landrault, Serge Pravossoudovitch: Fault modelling and fault equivalence in CMOS technology. EURO-DAC 1990: 407-412

Coauthor Index

1	David Andreu	[35]
2	Florence Azaïs	[11] [16]
3	L. Balado (Luz Balado)	[20] [23]
4	Frédéric Bancel	[21] [26] [28] [29]
5	Rodrigo P. Bastos	[49]
6	Nicolas Bérard	[21]
7	Serge Bernard	[16] [35]
8	Vincent Beroulle	[25] [30]
9	David Berthelot	[10] [12] [14]
10	Yves Bertrand	[11] [16] [20] [23] [40]
11	Anton Biasizzo	[20] [23]
12	K. Bousselam	[43] [44]
13	Stefano Di Carlo	[20] [23]
14	Philippe Cauvet	[35]
15	Érika F. Cota	[36]
16	Jean DaRolt	[47] [48] [51]
17	Julien Dalmasso	[27] [31] [36]
18	Amitabh Das	[51]
19	M. Doulcier	[37] [39] [41] [42]
20	Joan Figueras	[20]
21	D. Hammad	[3] [5]
22	David Hély	[21] [26] [28] [29]
23	J.-P. Van der Heyden	[20]
24	Christian Landrault	[1] [2] [4] [13] [19]
25	Laurent Latorre	[16] [40]
26	Regis Lorival	[11] [16]
27	Emili Lupon	[23]
28	Giorgio Di Natale	[32] [33] [34] [37] [38] [41] [42] [43] [44] [45] [46] [47] [48] [49] [50] [51]
29	Pascal Nouet	[40]
30	Ziad Noun	[35]
31	Franc Novak	[20] [23]
32	A. Petitqueux	[13] [19]
33	Christian Piguet	[18]
34	Ricardo Pires (R. Pires)	[6] [7] [8] [9]
35	Regis Poirier	[22] [24]
36	Julien Pouget	[15] [17]
37	Beatrice Pradarelli	[40]
38	Serge Pravossoudovitch	[1] [2]
39	N. Pricopi	[20] [23]
40	Paolo Prinetto	[20] [23]
41	Denis Réal	[50]
42	Michel Renovell	[21]
43	Chantal Robach	[25] [30]
44	Michel Robert	[18]
45	Bruno Rouzeyre	[3] [4] [5] [6] [7] [8] [9] [10] [12] [14] [15] [17] [18] [21] [22] [24] [25] [26] [27] [28] [29] [30] [31] [32] [33] [34] [36] [37] [38] [39] [41] [42] [43] [44] [45] [46] [47] [48] [49] [50] [51]
46	Mathieu Scholivé	[25] [30]
47	Miroslav Valka	[50]
48	Ingrid Verbauwhede	[51]
49	L. Volpe	[7] [8]
50	Hans-Joachim Wunderlich	[20] [23]

Last update Wed May 30 22:34:44 2012 CET by the DBLP Team — Data released under the ODC-BY 1.0 license — See also our legal information page