 | 2010 |
| 5 |  | Wolfgang Ecker,
Volkan Esen,
Rainer Findenig,
Thomas Steininger,
Michael Velten:
Model reduction techniques for the formal verification of hardware dependent software.
HLDVT 2010: 148-153 |
| 4 |  | Rainer Findenig,
Thomas Leitner,
Michael Velten,
Wolfgang Ecker:
Fast and accurate UML State Chart modeling using TLM+ control flow abstraction.
HLDVT 2010: 97-102 |
| 2009 |
| 3 |  | Rainer Findenig,
Florian Eibensteiner,
Markus Pfaff:
Optimizing the Hardware Usage of Parallel FSMs.
EUROCAST 2009: 63-68 |
| 2 |  | Florian Eibensteiner,
Rainer Findenig,
Markus Pfaff:
SynPSL: Behavioral Synthesis of PSL Assertions.
EUROCAST 2009: 69-74 |
| 2007 |
| 1 |  | Florian Eibensteiner,
Rainer Findenig,
Jürgen Tossold,
Wilfried Kubinger,
Josef Langer,
Markus Pfaff:
Embedded Robotic Solution: Integrating Robotics Interfaces with a High-Level CPU in a System-on-a-Chip.
EUROCAST 2007: 1017-1024 |