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| 2012 | ||
|---|---|---|
| 45 | Pavan Kumar Hanumolu, Un-Ku Moon, Terri S. Fiez: Tutorial T5: Advanced Analog-Mixed Signal System and Circuit Techniques. VLSI Design 2012: 20-21 | |
| 44 | Jim Le, Christopher Hanken, Martin Held, Michael S. Hagedorn, Kartikeya Mayaram, Terri S. Fiez: Experimental Characterization and Analysis of an Asynchronous Approach for Reduction of Substrate Noise in Digital Circuitry. IEEE Trans. VLSI Syst. 20(2): 344-356 (2012) | |
| 2011 | ||
| 43 | Ramin Zanbaghi, Saurabh Saxena, Gabor C. Temes, Terri S. Fiez: A 75dB SNDR, 10MHz conversion bandwidth stage-shared 2-2 MASH ΔΣ modulator dissipating 9mW. CICC 2011: 1-4 | |
| 42 | Samira Zali Asl, Saurabh Saxena, Pavan Kumar Hanumolu, Kartikeya Mayaram, Terri S. Fiez: A 77dB SNDR, 4MHz MASH ΔΣ modulator with a second-stage multi-rate VCO-based quantizer. CICC 2011: 1-4 | |
| 41 | Chao Shi, Brian Miller, Kartikeya Mayaram, Terri S. Fiez: A Multiple-Input Boost Converter for Low-Power Energy Harvesting. IEEE Trans. on Circuits and Systems 58-II(12): 827-831 (2011) | |
| 40 | Adam C. Heiberg, Thomas William Brown, Terri S. Fiez, Kartikeya Mayaram: A 250 mV, 352 μ W GPS Receiver RF Front-End in 130 nm CMOS. J. Solid-State Circuits 46(4): 938-949 (2011) | |
| 39 | Thomas William Brown, Farhad Farhabakhshian, Ankur Guha Roy, Terri S. Fiez, Kartikeya Mayaram: A 475 mV, 4.9 GHz Enhanced Swing Differential Colpitts VCO With Phase Noise of -136 dBc/Hz at a 3 MHz Offset Frequency. J. Solid-State Circuits 46(8): 1782-1795 (2011) | |
| 2010 | ||
| 38 | Farhad Farhabakhshian, Thomas William Brown, Kartikeya Mayaram, Terri S. Fiez: A 475 mV, 4.9 GHz enhanced swing differential Colpitts VCO in 130 nm CMOS with an FoM of 196.2 dBc/Hz. CICC 2010: 1-4 | |
| 37 | Ramin Zanbaghi, Terri S. Fiez, Gabor C. Temes: A new zero-optimization scheme for noise-coupled ΔΣ ADCs. ISCAS 2010: 2163-2166 | |
| 36 | James Ayers, Kartikeya Mayaram, Terri S. Fiez: An Ultralow-Power Receiver for Wireless Sensor Networks. J. Solid-State Circuits 45(9): 1759-1769 (2010) | |
| 2009 | ||
| 35 | Ramin Zanbaghi, Terri S. Fiez: A Novel Low Power Hybrid Loop Filter for Continuous-time Sigma-delta Modulators. ISCAS 2009: 3114-3117 | |
| 34 | Wai Leng Cheong, Brian Owens, Hui En Pham, Christopher Hanken, Jim Le, Terri S. Fiez, Kartikeya Mayaram: Comparison of supply noise and substrate noise reduction in SiGe BiCMOS and FDSOI processes. ISQED 2009: 112-115 | |
| 33 | Thomas William Brown, Mikko Hakkarainen, Terri S. Fiez: Frequency-Dependent Sampling Linearity. IEEE Trans. on Circuits and Systems 56-I(4): 740-753 (2009) | |
| 2008 | ||
| 32 | Chenggang Xu, Ranjit Gharpurey, Terri S. Fiez, Kartikeya Mayaram: Extraction of Parasitics in Inhomogeneous Substrates With a New Green Function-Based Method. IEEE Trans. on CAD of Integrated Circuits and Systems 27(9): 1595-1606 (2008) | |
| 2007 | ||
| 31 | James Ayers, Kartikeya Mayaram, Terri S. Fiez: Tradeoffs in the Design of CMOS Receivers for Low Power Wireless Sensor Networks. ISCAS 2007: 1345-1348 | |
| 30 | James Ayers, Kartikeya Mayaram, Terri S. Fiez: A Low Power BFSK Super-Regenerative Transceiver. ISCAS 2007: 3099-3102 | |
| 2006 | ||
| 29 | Chenggang Xu, Terri S. Fiez, Kartikeya Mayaram: An error control method for application of the discrete cosine transform to extraction of substrate parasitics in ICs. IEEE Trans. on CAD of Integrated Circuits and Systems 25(5): 932-938 (2006) | |
| 2005 | ||
| 28 | Chenggang Xu, Ranjit Gharpurey, Terri S. Fiez, Kartikeya Mayaram: A green function-based parasitic extraction method for inhomogeneous substrate layers. DAC 2005: 141-146 | |
| 27 | Husni M. Habal, Kartikeya Mayaram, Terri S. Fiez: Accurate and efficient simulation of synchronous digital switching noise in systems on a chip. IEEE Trans. VLSI Syst. 13(3): 330-338 (2005) | |
| 26 | Ajit Sharma, P. Birrer, S. K. Arunachalam, Chenggang Xu, Terri S. Fiez, Kartikeya Mayaram: Accurate Prediction of Substrate Parasitics in Heavily Doped CMOS Processes Using a Calibrated Boundary Element Solver. IEEE Trans. VLSI Syst. 13(7): 843-851 (2005) | |
| 25 | Chenggang Xu, Terri S. Fiez, Kartikeya Mayaram: On the numerical stability of Green's function for substrate coupling in integrated circuits. IEEE Trans. on CAD of Integrated Circuits and Systems 24(4): 653-658 (2005) | |
| 2004 | ||
| 24 | Madhu Chennam, Terri S. Fiez: A 0.35µm current-mode T/H with -81dB THD. ISCAS (1) 2004: 1112-1115 | |
| 23 | Sachin Ranganathan, Terri S. Fiez: A variable gain high linearity low power baseband filter for WLAN. ISCAS (1) 2004: 845-848 | |
| 22 | Husni M. Habal, Terri S. Fiez, Kartikeya Mayaram: An accurate and efficient estimation of switching noise in synchronous digital circuits. ISCAS (2) 2004: 485-488 | |
| 21 | Ajit Sharma, Chenggang Xu, Wen Kung Chu, Nishath K. Verghese, Terri S. Fiez, Kartikeya Mayaram: A predictive methodology for accurate substrate parasitic extraction. ISCAS (5) 2004: 149-152 | |
| 20 | Robert Shreeve, Terri S. Fiez, Kartikeya Mayaram: A physical and analytical model for substrate noise coupling analysis. ISCAS (5) 2004: 157-160 | |
| 19 | Chenggang Xu, Terri S. Fiez, Kartikeya Mayaram: An improved Z-parameter macro model for substrate noise coupling. ISCAS (5) 2004: 161-164 | |
| 2003 | ||
| 18 | Chenggang Xu, Terri S. Fiez, Kartikeya Mayaram: Coupled Simulation of Circuit and Piezoelectric Laminates. ISQED 2003: 369-372 | |
| 2002 | ||
| 17 | R. Batten, Terri S. Fiez: An efficient parallel delta-sigma ADC utilizing a shared multi-bit quantizer. ISCAS (3) 2002: 715-718 | |
| 16 | N. Barton, D. Ozis, Terri S. Fiez, Kartikeya Mayaram: Analysis of jitter in ring oscillators due to deterministic noise. ISCAS (4) 2002: 393-396 | |
| 15 | Zhimin Li, Terri S. Fiez: Dynamic element matching in low oversampling delta sigma ADCs. ISCAS (4) 2002: 683-686 | |
| 14 | D. Ozis, Kartikeya Mayaram, Terri S. Fiez: An efficient modeling approach for substrate noise coupling analysis. ISCAS (5) 2002: 237-240 | |
| 1999 | ||
| 13 | Anil Samavedam, Kartikeya Mayaram, Terri S. Fiez: A scalable substrate noise coupling model for mixed-signal ICs. ICCAD 1999: 128-131 | |
| 12 | Ravindranath Naiknaware, Terri S. Fiez: Switched-capacitor integrator design optimizing for power and process variations. ISCAS (2) 1999: 278-281 | |
| 11 | Ravindranath Naiknaware, Terri S. Fiez: Time-referenced single-path multi-bit Sigma-Delta ADC using a VCO based quantizer. ISCAS (2) 1999: 33-36 | |
| 10 | Anil Samavedam, Kartikeya Mayaram, Terri S. Fiez: Design-oriented substrate noise coupling macromodels for heavily doped CMOS processes. ISCAS (6) 1999: 218-221 | |
| 1998 | ||
| 9 | Ravindranath Naiknaware, Terri S. Fiez: CMOS analog circuit stack generation with matching constraints. ICCAD 1998: 371-375 | |
| 1997 | ||
| 8 | Detlev Schmitt, Terri S. Fiez: A low voltage CMOS current source. ISLPED 1997: 110-113 | |
| 1995 | ||
| 7 | Gregory M. Cooley, Terri S. Fiez, Bryan Buchanan: PWM and PCM Techniques for Control of Digitally Programmable Switching Power Supplies. ISCAS 1995: 1114-1117 | |
| 6 | Rex T. Baird, Terri S. Fiez: Improved Delta-Sigma DAC Linearity Using Data Weighted Averaging. ISCAS 1995: 13-16 | |
| 1994 | ||
| 5 | Farbod Aram, Aria Eshraghi, Terri S. Fiez: Compact and Accurate MOST Model for Analog Circuit Hand Calculations. ISCAS 1994: 213-216 | |
| 4 | Aria Eshraghi, Terri S. Fiez, Thomas R. Fischer: Asynchronus Implementation for the Add Compare Select Processor for Communication Systems. ISCAS 1994: 253-256 | |
| 3 | Ligang Zhang, Terry L. Sculley, Terri S. Fiez: A 12 Bit, 2V Current-Mode Pipelined A/D Converter Nonlinearity. ISCAS 1994: 369-372 | |
| 1993 | ||
| 2 | Rex T. Baird, Terri S. Fiez: Stability Analysis of High-order Modulators for Delta-Sigma ADCs. ISCAS 1993: 1361-1364 | |
| 1 | Edmund M. Schneider, Terri S. Fiez: Simulation of Switched-Current Systems. ISCAS 1993: 1420-1423 | |
Colors in the list of coauthors
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