Frederico Ferlini

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2009

2 Guilherme Guindani, Frederico Ferlini, Jeferson Oliveira, Ney Laert Vilar Calazans, Daniel V. Pigatto, Fernando Gehm Moraes: A 10 Gbps OTN Framer Implementation Targeting FPGA Devices. ReConFig 2009: 30-35

2007

1 Alexandre M. Amory, Frederico Ferlini, Marcelo Lubaszewski, Fernando Moraes: DfT for the Reuse of Networks-on-Chip as Test Access Mechanism. VTS 2007: 435-440

	2009
2		Guilherme Guindani, Frederico Ferlini, Jeferson Oliveira, Ney Laert Vilar Calazans, Daniel V. Pigatto, Fernando Gehm Moraes: A 10 Gbps OTN Framer Implementation Targeting FPGA Devices. ReConFig 2009: 30-35
	2007
1		Alexandre M. Amory, Frederico Ferlini, Marcelo Lubaszewski, Fernando Moraes: DfT for the Reuse of Networks-on-Chip as Test Access Mechanism. VTS 2007: 435-440

Coauthor Index

Last update Wed May 30 22:34:44 2012 CET by the DBLP Team —

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1	Alexandre M. Amory	[1]
2	Ney Laert Vilar Calazans (Ney Calazans)	[2]
3	Guilherme Guindani	[2]
4	Marcelo Lubaszewski	[1]
5	Fernando Gehm Moraes (Fernando Moraes)	[1] [2]
6	Jeferson Oliveira	[2]
7	Daniel V. Pigatto	[2]