 | 2012 |
| 35 |  | Xuan Guan,
Yunsi Fei,
Hai Lin:
Hierarchical Design of an Application-Specific Instruction Set Processor for High-Throughput and Scalable FFT Processing.
IEEE Trans. VLSI Syst. 20(3): 551-563 (2012) |
| 2011 |
| 34 |  | Xuan Guan,
Yunsi Fei:
Adaptive Extended Min-Sum Algorithm for Nonbinary LDPC Decoding.
GLOBECOM 2011: 1-6 |
| 33 |  | Qiasi Luo,
Yunsi Fei:
Algorithmic collision analysis for evaluating cryptographic systems and side-channel attacks.
HOST 2011: 75-80 |
| 2010 |
| 32 |  | Hai Lin,
Yunsi Fei:
A novel multi-objective instruction synthesis flow for application-specific instruction set processors.
ACM Great Lakes Symposium on VLSI 2010: 409-412 |
| 31 |  | Hai Lin,
Yunsi Fei:
Exploring custom instruction synthesis for application-specific instruction set processors with multiple design objectives.
ISLPED 2010: 141-146 |
| 30 |  | Tiansi Hu,
Yunsi Fei:
An Adaptive and Energy-efficient Routing Protocol Based on Machine Learning for Underwater Delay Tolerant Networks.
MASCOTS 2010: 381-384 |
| 29 |  | Xuan Guan,
Yunsi Fei:
Register file partitioning and recompilation for register file power reduction.
ACM Trans. Design Autom. Electr. Syst. 15(3): (2010) |
| 28 |  | Tiansi Hu,
Yunsi Fei:
QELAR: A Machine-Learning-Based Adaptive Routing Protocol for Energy-Efficient and Lifetime-Extended Underwater Sensor Networks.
IEEE Trans. Mob. Comput. 9(6): 796-809 (2010) |
| 27 |  | Hai Lin,
Yunsi Fei,
Xuan Guan,
Zhijie Jerry Shi:
Architectural Enhancement and System Software Support for Program Code Integrity Monitoring in Application-Specific Instruction-Set Processors.
IEEE Trans. VLSI Syst. 18(11): 1519-1532 (2010) |
| 26 |  | Xuan Guan,
Yunsi Fei:
Register File Partitioning and Compiler Support for Reducing Embedded Processor Power Consumption.
IEEE Trans. VLSI Syst. 18(8): 1248-1252 (2010) |
| 2009 |
| 25 |  | Xuan Guan,
Hai Lin,
Yunsi Fei:
Design of an application-specific instruction set processor for high-throughput and scalable FFT.
DATE 2009: 1302-1307 |
| 24 |  | Hai Lin,
Yunsi Fei:
Resource sharing of pipelined custom hardware extension for energy-efficient application-specific instruction set processor design.
ICCD 2009: 158-165 |
| 23 |  | Xuan Guan,
Yunsi Fei,
Hai Lin:
A Hierarchical Design of an Application-specific Instruction Set Processor for High-throughput FFT.
ISCAS 2009: 2513-2516 |
| 22 |  | Juan Carlos Martinez Santos,
Yunsi Fei,
Zhijie Jerry Shi:
PIFT: efficient dynamic information flow tracking using secure page allocation.
WESS 2009 |
| 21 |  | Hai Lin,
Yunsi Fei:
Orchestrating Horizontal Parallelism and Vertical Instruction Packing of Programs to Improve System Overall Efficiency.
IEEE Trans. Computers 58(9): 1211-1220 (2009) |
| 2008 |
| 20 |  | Vamsi Kundeti,
Yunsi Fei,
Sanguthevar Rajasekaran:
An efficient digital circuit for implementing Sequence Alignment algorithm in an extended processor.
ASAP 2008: 156-161 |
| 19 |  | Xuan Guan,
Yunsi Fei:
Reducing power consumption of embedded processors through register file partitioning and compiler support.
ASAP 2008: 269-274 |
| 18 |  | Hai Lin,
Yunsi Fei:
Harnessing Horizontal Parallelism and Vertical Instruction Packing of Programs to Improve System Overall Efficiency.
DATE 2008: 758-763 |
| 17 |  | Juan Carlos Martinez Santos,
Yunsi Fei:
Leveraging speculative architectures for run-time program validation.
ICCD 2008: 498-505 |
| 16 |  | Tiansi Hu,
Yunsi Fei:
QELAR: A Q-learning-based Energy-Efficient and Lifetime-Aware Routing Protocol for Underwater Sensor Networks.
IPCCC 2008: 247-255 |
| 15 |  | Hai Lin,
Guangyu Sun,
Yunsi Fei,
Yuan Xie,
Anand Sivasubramaniam:
Thermal-aware Design Considerations for Application-Specific Instruction Set Processor.
SASP 2008: 63-68 |
| 14 |  | Yunsi Fei,
Lin Zhong,
Niraj K. Jha:
An energy-aware framework for dynamic software management in mobile computing systems.
ACM Trans. Embedded Comput. Syst. 7(3): (2008) |
| 2007 |
| 13 |  | Hai Lin,
Yunsi Fei:
Utilizing custom registers in application-specific instruction set processors for register spills elimination.
ACM Great Lakes Symposium on VLSI 2007: 323-328 |
| 12 |  | Yunsi Fei,
Zhijie Jerry Shi:
Microarchitectural support for program code integrity monitoring in application-specific instruction set processors.
DATE 2007: 815-820 |
| 11 |  | Hai Lin,
Xuan Guan,
Yunsi Fei,
Zhijie Jerry Shi:
Compiler-assisted architectural support for program code integrity monitoring in application-specific instruction set processors.
ICCD 2007: 187-193 |
| 10 |  | Yunsi Fei,
Srivaths Ravi,
Anand Raghunathan,
Niraj K. Jha:
Energy-optimizing source code transformations for operating system-driven embedded software.
ACM Trans. Embedded Comput. Syst. 7(1): (2007) |
| 2005 |
| 9 |  | Yunsi Fei,
Niraj K. Jha:
Integrated functional partitioning and synthesis for low power distributed systems of systems-on-a-chip.
IJES 1(1/2): 2-13 (2005) |
| 2004 |
| 8 |  | Yunsi Fei,
Lin Zhong,
Niraj K. Jha:
An Energy-Aware Framework for Coordinated Dynamic Software Management in Mobile Computers.
MASCOTS 2004: 306-317 |
| 7 |  | Yunsi Fei,
Srivaths Ravi,
Anand Raghunathan,
Niraj K. Jha:
Energy-Optimizing Source Code Transformations for OS-driven Embedded Software.
VLSI Design 2004: 261-266 |
| 6 |  | Yunsi Fei,
Srivaths Ravi,
Anand Raghunathan,
Niraj K. Jha:
A hybrid energy-estimation technique for extensible processors.
IEEE Trans. on CAD of Integrated Circuits and Systems 23(5): 652-664 (2004) |
| 5 |  | Jiong Luo,
Lin Zhong,
Yunsi Fei,
Niraj K. Jha:
Register binding-based RTL power management for control-flow intensive designs.
IEEE Trans. on CAD of Integrated Circuits and Systems 23(8): 1175-1183 (2004) |
| 2003 |
| 4 |  | Weidong Wang,
Tat Kee Tan,
Jiong Luo,
Yunsi Fei,
Li Shang,
Keith S. Vallerio,
Lin Zhong,
Anand Raghunathan,
Niraj K. Jha:
A comprehensive high-level synthesis system for control-flow intensive behaviors.
ACM Great Lakes Symposium on VLSI 2003: 11-14 |
| 3 |  | Yunsi Fei,
Srivaths Ravi,
Anand Raghunathan,
Niraj K. Jha:
Energy Estimation for Extensible Processors.
DATE 2003: 10682-10687 |
| 2002 |
| 2 |  | Lin Zhong,
Jiong Luo,
Yunsi Fei,
Niraj K. Jha:
Register Binding Based Power Management for High-level Synthesis of Control-Flow Intensive Behaviors.
ICCD 2002: 391-394 |
| 1 |  | Yunsi Fei,
Niraj K. Jha:
Functional Partitioning for Low Power Distributed Systems of Systems-on-a-Chip.
VLSI Design 2002: 274-281 |