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| 2011 | ||
|---|---|---|
| 3 | Parijat Mukherjee, G. Peter Fang, Rod Burt, Peng Li: Automatic stability checking for large linear analog integrated circuits. DAC 2011: 304-309 | |
| 2010 | ||
| 2 | G. Peter Fang, Rod Burt, Ning Dong: Loop finder analysis for analog circuits. CICC 2010: 1-4 | |
| 2005 | ||
| 1 | G. Peter Fang, David C. Yeh, David T. Zweidinger, Lawrence A. Arledge Jr., Vinod Gupta: Fast, accurate MOS table model for circuit simulation using an unstructured grid and preserving monotonicity. ASP-DAC 2005: 1102-1106 | |
| 1 | Lawrence A. Arledge Jr. | [1] |
| 2 | Rod Burt | [2] [3] |
| 3 | Ning Dong | [2] |
| 4 | Vinod Gupta | [1] |
| 5 | Peng Li | [3] |
| 6 | Parijat Mukherjee | [3] |
| 7 | David C. Yeh | [1] |
| 8 | David T. Zweidinger | [1] |
Colors in the list of coauthors
Last update Tue May 29 20:41:18 2012 CET by the DBLP Team —
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