Suhaib A. Fahmy

	2012
19		Kizheppatt Vipin, Suhaib A. Fahmy: Architecture-Aware Reconfiguration-Centric Floorplanning for Partial Reconfiguration. ARC 2012: 13-25
18		Samarjit Chakraborty, Martin Lukasiewycz, Christian Buckl, Suhaib A. Fahmy, Naehyuck Chang, Sangyoung Park, Younghyun Kim, Patrick Leteinturier, Hans Adlkofer: Embedded systems and software challenges in electric vehicles. DATE 2012: 424-429
17		Hui Yan Cheah, Suhaib A. Fahmy, Douglas L. Maskell, Chidamber Kulkarni: A lean FPGA soft processor built using a DSP block. FPGA 2012: 237-240
	2011
16		Kizheppatt Vipin, Suhaib A. Fahmy: A threat-based Connect6 implementation on FPGA. FPT 2011: 1-4
15		Kizheppatt Vipin, Suhaib A. Fahmy: Enabling high level design of adaptive systems with partial reconfiguration. FPT 2011: 1-4
14		Kizheppatt Vipin, Suhaib A. Fahmy: Efficient region allocation for adaptive partial reconfiguration. FPT 2011: 1-6
13		Jorg Lotze, Suhaib A. Fahmy, Juanjo Noguera, Linda Doyle: A Model-Based Approach to Cognitive Radio Design. IEEE Journal on Selected Areas in Communications 29(2): 455-468 (2011)
	2010
12		Suhaib A. Fahmy, Linda Doyle: Reconfigurable Polyphase Filter Bank Architecture for Spectrum Sensing. ARC 2010: 343-350
11		Suhaib A. Fahmy: Histogram-based probability density function estimation on FPGAs. FPT 2010: 449-453
10		Paul D. Sutton, Jörg Lotze, Hicham Lahlou, Suhaib A. Fahmy, Keith E. Nolan, Baris Özgül, Thomas W. Rondeau, Juanjo Noguera, Linda Doyle: Iris: an architecture for cognitive radio networking testbeds. IEEE Communications Magazine 48(9): 114-122 (2010)
	2009
9		Suhaib A. Fahmy, Jorg Lotze, Juanjo Noguera, Linda Doyle, Robert Esser: Generic Software Framework for Adaptive Applications on FPGAs. FCCM 2009: 55-62
8		Jorg Lotze, Suhaib A. Fahmy, Juanjo Noguera, Baris Özgül, Linda Doyle, Robert Esser: Development Framework for Implementing FPGA-Based Cognitive Network Nodes. GLOBECOM 2009: 1-7
7		Suhaib A. Fahmy, Peter Y. K. Cheung, Wayne Luk: High-throughput one-dimensional median and weighted median filters on FPGA. IET Computers & Digital Techniques 3(4): 384-394 (2009)
	2008
6		Suhaib A. Fahmy: Generalised Parallel Bilinear Interpolation Architecture for Vision Systems. ReConFig 2008: 331-336
	2007
5		Suhaib A. Fahmy, Christos-Savvas Bouganis, Peter Y. K. Cheung, Wayne Luk: Real-time hardware acceleration of the trace transform. J. Real-Time Image Processing 2(4): 235-248 (2007)
	2006
4		Suhaib A. Fahmy: Investigating Trace Transform Architectures for Face Authentication. FPL 2006: 1-2
3		Suhaib A. Fahmy, Christos-Savvas Bouganis, Peter Y. K. Cheung, Wayne Luk: Efficient Realtime FPGA Implementation of the Trace Transform. FPL 2006: 1-6
	2005
2		Suhaib A. Fahmy, Peter Y. K. Cheung, Wayne Luk: Hardware Acceleration of Hidden Markov Model Decoding for Person Detection. DATE 2005: 8-13
1		Suhaib A. Fahmy, Peter Y. K. Cheung, Wayne Luk: Novel FPGA-Based Implementation of Median and Weighted Median Filters for Image Processing. FPL 2005: 142-147

Coauthor Index

1	Hans Adlkofer	[18]
2	Christos-Savvas Bouganis	[3] [5]
3	Christian Buckl	[18]
4	Samarjit Chakraborty	[18]
5	Naehyuck Chang	[18]
6	Hui Yan Cheah	[17]
7	Peter Y. K. Cheung	[1] [2] [3] [5] [7]
8	Linda Doyle	[8] [9] [10] [12] [13]
9	Robert Esser	[8] [9]
10	Younghyun Kim	[18]
11	Chidamber Kulkarni	[17]
12	Hicham Lahlou	[10]
13	Patrick Leteinturier	[18]
14	Jörg Lotze (Jorg Lotze)	[8] [9] [10] [13]
15	Wayne Luk	[1] [2] [3] [5] [7]
16	Martin Lukasiewycz	[18]
17	Douglas L. Maskell	[17]
18	Juanjo Noguera	[8] [9] [10] [13]
19	Keith E. Nolan	[10]
20	Baris Özgül	[8] [10]
21	Sangyoung Park	[18]
22	Thomas W. Rondeau	[10]
23	Paul D. Sutton	[10]
24	Kizheppatt Vipin	[14] [15] [16] [19]

Colors in the list of coauthors

Last update Wed May 30 22:34:44 2012 CET by the DBLP Team — Data released under the ODC-BY 1.0 license — See also our legal information page