 | 2011 |
| 13 |  | Allan Crone,
Oliver Bringmann,
C. Chevallaz,
B. Dickman,
Volkan Esen,
M. Rohleder:
State of the art verification methodologies in 2015.
DATE 2011: 1339 |
| 12 |  | Alexander W. Rath,
Volkan Esen,
Wolfgang Ecker:
Analog transaction level modeling.
HLDVT 2011: 82 |
| 2010 |
| 11 |  | Wolfgang Ecker,
Volkan Esen,
Robert Schwencker,
Thomas Steininger,
Michael Velten:
TLM+ modeling of embedded HW/SW systems.
DATE 2010: 75-80 |
| 10 |  | Wolfgang Ecker,
Volkan Esen,
Rainer Findenig,
Thomas Steininger,
Michael Velten:
Model reduction techniques for the formal verification of hardware dependent software.
HLDVT 2010: 148-153 |
| 2008 |
| 9 |  | Volkan Esen:
A new assertion language covering multiple levels of abstraction.
Technical University Munich 2008: 1-212 |
| 2007 |
| 8 |  | Wolfgang Ecker,
Volkan Esen,
Lars Schönberg,
Thomas Steininger,
Michael Velten,
Michael Hull:
Interactive presentation: Impact of description language, abstraction layer, and value representation on simulation performance.
DATE 2007: 767-772 |
| 7 |  | Wolfgang Ecker,
Volkan Esen,
Thomas Steininger,
Michael Velten,
Michael Hull:
Interactive presentation: Implementation of a transaction level assertion framework in SystemC.
DATE 2007: 894-899 |
| 6 |  | Wolfgang Ecker,
Volkan Esen,
Thomas Steininger,
Michael Velten:
Requirements and Concepts for Transaction Level Assertion Refinement.
IESS 2007: 1-14 |
| 2006 |
| 5 |  | Wolfgang Ecker,
Volkan Esen,
Thomas Steininger,
Michael Velten:
Case Study on Transaction Level Modeling.
FDL 2006: 209-215 |
| 4 |  | Wolfgang Ecker,
Volkan Esen,
Thomas Steininger,
Michael Velten,
Jacob Smit:
IP Library For Temporal SystemC Assertions.
FDL 2006: 301-309 |
| 3 |  | Wolfgang Ecker,
Volkan Esen,
Michael Hull,
Thomas Steininger,
Michael Velten:
Requirements and Concepts for Transaction Level Assertions.
ICCD 2006 |
| 2 |  | Wolfgang Ecker,
Volkan Esen,
Michael Hull:
Execution semantics and formalisms for multi-abstraction TLM assertions.
MEMOCODE 2006: 93-102 |
| 2004 |
| 1 |  | Wolfgang Ecker,
Volkan Esen,
Thomas Steininger,
Martin Zambaldi:
Memory Models for the Formal Verification of Assembler Code Using Bounded Model Checking.
ISORC 2004: 129-135 |