Bernhard Eschermann

	1996
12		Silke Draber, Bernhard Eschermann: Dependability Evaluation of a Computing System for Traction Control of Electrical Locomotives. EDCC 1996: 129-140
	1994
11		Bernhard Eschermann, Hubert D. Kirrmann: Fail-Safe On-Board Communication for Automatic Train Protection. GI Jahrestagung 1994: 356-363
	1993
10		Bernhard Eschermann: Funktionaler Entwurf digitaler Schaltungen - Methoden und CAD-Techniken. Springer 1993: I-XI, 1-285
9		Bernhard Eschermann: State Assignment for Hardwired VLSI Control Units. ACM Comput. Surv. 25(4): 415-436 (1993)
8		Bernhard Eschermann: Enhancing on-line testability during synthesis. J. Electronic Testing 4(1): 105-116 (1993)
	1992
7		Bernhard Eschermann: On Combining Off-Line BIST and On-Line Control Flow Checking. FTCS 1992: 298-305
6		Bernhard Eschermann, Hans-Joachim Wunderlich: Optimized synthesis techniques for testable sequential circuits. IEEE Trans. on CAD of Integrated Circuits and Systems 11(3): 301-312 (1992)
5		Bernhard Eschermann: An implicitly testable boundary scan TAP controller. J. Electronic Testing 3(2): 159-169 (1992)
	1991
4		Bernhard Eschermann, Hans-Joachim Wunderlich: A Unified Approach for the Synthesis of Self-Testable Finite State Machines. DAC 1991: 372-377
3		Bernhard Eschermann, Hans-Joachim Wunderlich: Emulation of Scan Paths in Sequential Circuit Synthesis. Fault-Tolerant Computing Systems 1991: 136-147
2		Juergen Froessl, Bernhard Eschermann: Module Generation for AND/XOR Fields (XPLAs). ICCD 1991: 26-29
	1990
1		Bernhard Eschermann, Hans-Joachim Wunderlich: Optimized synthesis of self-testable finite state machines. FTCS 1990: 390-397

Coauthor Index

1	Silke Draber	[12]
2	Juergen Froessl	[2]
3	Hubert D. Kirrmann	[11]
4	Hans-Joachim Wunderlich	[1] [3] [4] [6]

Colors in the list of coauthors

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