| | |
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 | 2012 | |
|---|---|---|
| 4 |      | Meisam Honarvar Nazari, Azita Emami-Neyestanak: An 18.6Gb/s double-sampling receiver in 65nm CMOS for ultra-low-power optical communication. ISSCC 2012: 130-131 |
| 3 | | Matthew Loh, Azita Emami-Neyestanak: A 3x9 Gb/s Shared, All-Digital CDR for High-Speed, High-Density I/O. J. Solid-State Circuits 47(3): 641-651 (2012) |
| 2011 | ||
| 2 | | Meisam Honarvar Nazari, Azita Emami-Neyestanak: A 15Gb/s 0.5mW/Gb/s 2-tap DFE receiver with far-end crosstalk cancellation. ISSCC 2011: 446-448 |
| 2007 | ||
| 1 | | Amir Agah, Seid Mehdi Fakhraie, Azita Emami-Neyestanak: Tertiary-Tree 12-GHz 32-bit Adder in 65nm Technology. ISCAS 2007: 3006-3009 |
| 1 | Amir Agah | [1] |
| 2 | Sied Mehdi Fakhraie (Seid Mehdi Fakhraie) | [1] |
| 3 | Matthew Loh | [3] |
| 4 | Meisam Honarvar Nazari | [2] [4] |
Colors in the list of coauthors
Last update Tue May 29 20:41:18 2012 CET by the DBLP Team —
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