 | 2003 |
|---|
| 8 |       | Michael J. Pont,
Andrew Norman,
Chisanga Mwelwa,
Tim Edwards:
Prototyping Time-triggered Embedded Systems using PC Hardware.
EuroPLoP 2003: 691-716 |
| 2002 |
|---|
| 7 | | Supamas Sirichotiyakul,
Tim Edwards,
Chanhee Oh,
Rajendran Panda,
David Blaauw:
Duet: an accurate leakage estimation and optimization tool for dual-Vt circuits.
IEEE Trans. VLSI Syst. 10(2): 79-90 (2002) |
| 2000 |
|---|
| 6 | | Min Zhao,
Rajendran Panda,
Sachin S. Sapatnekar,
Tim Edwards,
Rajat Chaudhry,
David Blaauw:
Hierarchical analysis of power distribution networks.
DAC 2000: 150-155 |
| 5 | | Rajat Chaudhry,
David Blaauw,
Rajendran Panda,
Tim Edwards:
Current signature compression for IR-drop analysis.
DAC 2000: 162-167 |
| 4 | | Rajat Chaudhry,
Rajendran Panda,
Tim Edwards,
David Blaauw:
Design and Analysis of Power Distribution Networks with Accurate RLC Models.
VLSI Design 2000: 151-155 |
| 1999 |
|---|
| 3 | | Supamas Sirichotiyakul,
Tim Edwards,
Chanhee Oh,
Jingyan Zuo,
Abhijit Dharchoudhury,
Rajendran Panda,
David Blaauw:
Stand-by Power Minimization Through Simultaneous Threshold Voltage Selection and Circuit Sizing.
DAC 1999: 436-441 |
| 1998 |
|---|
| 2 | | Rajendran Panda,
Abhijit Dharchoudhury,
Tim Edwards,
Joe Norton,
David Blaauw:
Migration: A New Technique to Improve Synthesized Designs Through Incremental Customization.
DAC 1998: 388-391 |
| 1 | | David Blaauw,
Abhijit Dharchoudhury,
Rajendran Panda,
Supamas Sirichotiyakul,
Chanhee Oh,
Tim Edwards:
Emerging power management tools for processor design.
ISLPED 1998: 143-148 |
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