Pedro Echeverría

Pedro Echeverría Aramendi

	2011
5		Pedro Echeverría, Marisa López-Vallejo: Customizing floating-point units for FPGAs: Area-performance-standard trade-offs. Microprocessors and Microsystems - Embedded Hardware Design 35(6): 535-546 (2011)
	2009
4		Pedro Echeverría, Marisa López-Vallejo, Walter Bolognesi, Carlos A. López-Barrio: Exploring performance-power trade-offs for look-up tables in SRAM-based FPGAs. ICECS 2009: 423-426
	2008
3		Pedro Echeverría, David B. Thomas, Marisa López-Vallejo, Wayne Luk: An FPGA run-time parameterisable Log-Normal Random Number Generator. ARC 2008: 219-230
2		Miguel Angel Sánchez, Pedro Echeverría, Francisco Mansilla, Marisa López-Vallejo: Designing Highly Parameterized Hardware using xHdl. FDL 2008: 78-83
1		Pedro Echeverría Aramendi, José L. Ayala, Marisa López-Vallejo: Power Considerations in Banked CAMs: A Leakage Reduction Approach. VLSI Design 2008: (2008)

Coauthor Index

1	José Luis Ayala (José L. Ayala)	[1]
2	Walter Bolognesi	[4]
3	Carlos A. López-Barrio	[4]
4	Marisa López-Vallejo (Marisa Luisa López-Vallejo)	[1] [2] [3] [4] [5]
5	Wayne Luk	[3]
6	Francisco Mansilla	[2]
7	Miguel Angel Sánchez	[2]
8	David B. Thomas	[3]

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