Bradley F. Dutton

	2010
7		Charles E. Stroud, Bradley F. Dutton: The First Clock Cycle Is A Real BIST. ESA 2010: 86-92
6		Bradley F. Dutton, Charles E. Stroud: On-Line Single Event Upset Detection and Correction in Field Programmable Gate Array Configuration Memories. I. J. Comput. Appl. 17(2): 59-69 (2010)
	2009
5		Bradley F. Dutton, Charles E. Stroud: Single Event Upset Detection and Correction in Virtex-4 and Virtex-5 FPGAs. CATA 2009: 57-62
4		George J. Starr, Jie Qin, Bradley F. Dutton, Charles E. Stroud, Foster F. Dai, Victor P. Nelson: Automated Generation of Built-In Self-Test and Measurement Circuitry for Mixed-Signal Circuits and Systems. DFT 2009: 11-19
3		Bradley F. Dutton, Charles E. Stroud: Soft Core Embedded Processor Based Built-In Self-Test of FPGAs. DFT 2009: 29-37
2		Bradley F. Dutton, Charles E. Stroud: Built-In Self-Test of Embedded SEU Detection Cores in Virtex-4 and Virtex-5 FPGAs. ESA 2009: 149-155
1		Bradley F. Dutton, Mustafa Ali, Charles E. Stroud, John Sunwoo: Embedded Processor Based Fault Injection and SEU Emulation for FPGAs. ESA 2009: 183-189

Coauthor Index

1	Mustafa Ali	[1]
2	Foster F. Dai (Fa Foster Dai)	[4]
3	Victor P. Nelson	[4]
4	Jie Qin	[4]
5	George J. Starr	[4]
6	Charles E. Stroud	[1] [2] [3] [4] [5] [6] [7]
7	John Sunwoo	[1]

Last update Tue May 29 20:41:18 2012 CET by the DBLP Team — Data released under the ODC-BY 1.0 license — See also our legal information page