Santanu Dutta

	2007
17		Balaji Raman, Samarjit Chakraborty, Wei Tsang Ooi, Santanu Dutta: Reducing Data-Memory Footprint of Multimedia Applications by Delay Redistribution. DAC 2007: 738-743
16		Santanu Dutta: Recent Trends in the Design of Video Signal Processing IPS and Multimedia SoCs. SECRYPT 2007: 13
	2005
15		Santanu Dutta: Design of Multimillion-Gate Multimedia SoCs: Where do we stand? ESTImedia 2005: 4
	2003
14		Santanu Dutta: Architecture and Implementation of Multi-Processor SoCs for Advanced Set-Top Box and Digital TV Systems. SBCCI 2003: 145
	2001
13		Santanu Dutta, Rune Jensen, Alf Rieckmann: Viper: A Multiprocessor SOC for Advanced Set-Top Box and Digital TV Systems. IEEE Design & Test of Computers 18(5): 21-31 (2001)
	2000
12		Santanu Dutta: Architecture, Design, and Verification of an 18 Million Transistor Digital Television and Media Processor Chip. PATMOS 2000: 225-232
11		Santanu Dutta, Deepak Singh, Essam Abu-Ghoush, Vijay Mehra: Architecture and Implementation of a High-Definition Video Co-Processor for Digital Television Applications. VLSI Design 2000: 350-359
	1999
10		Santanu Dutta, Vijay Mehra, Weiwen Zhu, Deepak Singh, Marcel Janssens, Ramakrishna Vengalasetti, Boaz Ben-Nun, Pardha Pothana, Venkat Adusumilli, Nahid King, John Yen-Han Huang, Lie Ling, Chris Nelson, Jai Bannur, Sarah Wu: Architecture and design of a Talisman-compatible multimedia processor. IEEE Trans. Circuits Syst. Video Techn. 9(4): 565-579 (1999)
9		Santanu Dutta, Wayne Wolf: A circuit-driven design methodology for video signal-processing datapath elements. IEEE Trans. VLSI Syst. 7(2): 229-240 (1999)
	1998
8		Santanu Dutta, Wayne Wolf, Andrew Wolfe: A methodology to evaluate memory architecture design tradeoffs for video signal processors. IEEE Trans. Circuits Syst. Video Techn. 8(1): 36-53 (1998)
7		Santanu Dutta, Kevin J. O'Connor, Wayne Wolf, Andrew Wolfe: A design study of a 0.25-μm video signal processor. IEEE Trans. Circuits Syst. Video Techn. 8(4): 501-519 (1998)
	1997
6		Andrew Wolfe, Jason Fritts, Santanu Dutta, Edil S. Tavares Fernandes: Datapath Design for a VLIW Video Signal Processor. HPCA 1997: 24-35
	1995
5		Santanu Dutta, Wayne Wolf, Andrew Wolfe: VLSI issues in memory-system design for video signal processors. ICCD 1995: 498-
	1994
4		Santanu Dutta, Wayne Wolf: Asymptotic Limits of Video Signal Processing Architectures. ICCD 1994: 622-625
3		Santanu Dutta, Sudip Nag, Kaushik Roy: ASAP: A Transistor Sizing Tool for Speed Area and Power Optimization of Static CMOS Circuits. ISCAS 1994: 61-64
	1993
2		Kaushik Roy, Sudip Nag, Santanu Dutta: Channel Architecture Optimization for Performance and Routability of Row-Based FPGAs. ICCD 1993: 220-223
	1990
1		Douglas R. Holberg, Santanu Dutta, Lawrence T. Pillage: DC Parameterized Piecewise-Function Transistor Models for Bipolar and MOS Logic Stage Delay Evaluation. ICCAD 1990: 546-549

Coauthor Index

1	Essam Abu-Ghoush	[11]
2	Venkat Adusumilli	[10]
3	Jai Bannur	[10]
4	Boaz Ben-Nun	[10]
5	Samarjit Chakraborty	[17]
6	Edil S. Tavares Fernandes	[6]
7	Jason Fritts	[6]
8	Douglas R. Holberg	[1]
9	John Yen-Han Huang	[10]
10	Marcel Janssens	[10]
11	Rune Jensen	[13]
12	Nahid King	[10]
13	Lie Ling	[10]
14	Vijay Mehra	[10] [11]
15	Sudip Nag	[2] [3]
16	Chris Nelson	[10]
17	Kevin J. O'Connor	[7]
18	Wei Tsang Ooi	[17]
19	Lawrence T. Pileggi (Larry T. Pileggi, Lawrence T. Pillage)	[1]
20	Pardha Pothana	[10]
21	Balaji Raman	[17]
22	Alf Rieckmann	[13]
23	Kaushik Roy	[2] [3]
24	Deepak Singh	[10] [11]
25	Ramakrishna Vengalasetti	[10]
26	Marilyn Wolf (Wayne Wolf, Wayne Hendrix Wolf)	[4] [5] [7] [8] [9]
27	Andrew Wolfe	[5] [6] [7] [8]
28	Sarah Wu	[10]
29	Weiwen Zhu	[10]

Colors in the list of coauthors

Last update Tue May 29 20:41:18 2012 CET by the DBLP Team — Data released under the ODC-BY 1.0 license — See also our legal information page