Karthik Duraisami

	2010
11		Ashutosh Chakraborty, Karthik Duraisami, Prassanna Sithambaram, Alberto Macii, Enrico Macii, Massimo Poncino: Thermal-Aware Clock Tree Design to Increase Timing Reliability of Embedded SoCs. IEEE Trans. on Circuits and Systems 57-I(10): 2741-2752 (2010)
	2009
10		Karthik Duraisami, Enrico Macii, Massimo Poncino: Using soft-edge flip-flops to compensate NBTI-induced delay degradation. ACM Great Lakes Symposium on VLSI 2009: 169-172
	2008
9		Karthik Duraisami, Enrico Macii, Massimo Poncino: Energy efficiency bounds of pulse-encoded buses. ACM Great Lakes Symposium on VLSI 2008: 183-188
8		Ashutosh Chakraborty, Karthik Duraisami, Ashoka Visweswara Sathanur, Prassanna Sithambaram, Luca Benini, Alberto Macii, Enrico Macii, Massimo Poncino: Dynamic Thermal Clock Skew Compensation Using Tunable Delay Buffers. IEEE Trans. VLSI Syst. 16(6): 639-649 (2008)
7		Ashutosh Chakraborty, Karthik Duraisami, Ashoka Visweswara Sathanur, Prassanna Sithambaram, Alberto Macii, Enrico Macii, Massimo Poncino: Implementation of a thermal management unit for canceling temperature-dependent clock skew variations. Integration 41(1): 2-8 (2008)
6		Andrea Calimera, Karthik Duraisami, Ashoka Visweswara Sathanur, Prassanna Sithambaram, R. Iris Bahar, Alberto Macii, Enrico Macii, Massimo Poncino: Thermal-Aware Design Techniques for Nanometer CMOS Circuits. J. Low Power Electronics 4(3): 374-384 (2008)
	2007
5		Karthik Duraisami, Prassanna Sithambaram, Ashoka Visweswara Sathanur, Alberto Macii, Enrico Macii, Massimo Poncino: Design Exploration of a Thermal Management Unit for Dynamic Control of Temperature-Induced Clock Skew. ISCAS 2007: 1061-1064
	2006
4		Ashutosh Chakraborty, Prassanna Sithambaram, Karthik Duraisami, Alberto Macii, Enrico Macii, Massimo Poncino: Thermal resilient bounded-skew clock tree optimization methodology. DATE 2006: 832-837
3		Ashutosh Chakraborty, Karthik Duraisami, Ashoka Visweswara Sathanur, Prassanna Sithambaram, Alberto Macii, Enrico Macii, Massimo Poncino: Implications of ultra low-voltage devices on design techniques for controlling leakage in NanoCMOS circuits. ISCAS 2006
2		Ashutosh Chakraborty, Karthik Duraisami, Ashoka Visweswara Sathanur, Prassanna Sithambaram, Luca Benini, Alberto Macii, Enrico Macii, Massimo Poncino: Dynamic thermal clock skew compensation using tunable delay buffers. ISLPED 2006: 162-167
1		Ashutosh Chakraborty, Karthik Duraisami, Ashoka Visweswara Sathanur, Prassanna Sithambaram, Alberto Macii, Enrico Macii, Massimo Poncino: Dynamic Management of Thermally-Induced Clock Skew: An Implementation Perspective. PATMOS 2006: 214-224

Coauthor Index

1	R. Iris Bahar	[6]
2	Luca Benini	[2] [8]
3	Andrea Calimera	[6]
4	Ashutosh Chakraborty	[1] [2] [3] [4] [7] [8] [11]
5	Alberto Macii	[1] [2] [3] [4] [5] [6] [7] [8] [11]
6	Enrico Macii	[1] [2] [3] [4] [5] [6] [7] [8] [9] [10] [11]
7	Massimo Poncino	[1] [2] [3] [4] [5] [6] [7] [8] [9] [10] [11]
8	Ashoka Visweswara Sathanur	[1] [2] [3] [5] [6] [7] [8]
9	Prassanna Sithambaram	[1] [2] [3] [4] [5] [6] [7] [8] [11]

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