Jeffrey T. Draper

Jeff Draper

	2011
40		Woojin Choi, Jeff Draper: Unified Signatures for Improving Performance in Transactional Memory. IPDPS 2011: 817-827
	2010
39		Bilal Zafar, Jeff Draper, Timothy Mark Pinkston: Cubic Ring Networks: A Polymorphic Topology for Network-on-Chip. ICPP 2010: 443-452
38		Woojin Choi, Jeff Draper: Locality-aware adaptive grain signatures for Transactional Memories. IPDPS 2010: 1-10
37		Woojin Choi, Young Hoon Kang, Taek-Jun Kwon, Jeff Draper: Implementation of adaptive grain signatures for transactional memories. ISCAS 2010: 3489-3492
36		Mahta Haghi, Jeff Draper: A single-event upset hardening technique for high speed MOS Current Mode Logic. ISCAS 2010: 4137-4140
35		Young Hoon Kang, Taek-Jun Kwon, Jeffrey T. Draper: Fault-Tolerant Flow Control in On-chip Networks. NOCS 2010: 79-86
	2009
34		Young Hoon Kang, Jeff Sondeen, Jeffrey T. Draper: Multicast routing with dynamic packet fragmentation. ACM Great Lakes Symposium on VLSI 2009: 113-116
33		Mahta Haghi, Jeff Draper: The effect of design parameters on single-event upset sensitivity of MOS current mode logic. ACM Great Lakes Symposium on VLSI 2009: 233-238
32		Young Hoon Kang, Taek-Jun Kwon, Jeff Draper: Dynamic packet fragmentation for increased virtual channel utilization in on-chip routers. NOCS 2009: 250-255
31		Taek-Jun Kwon, Jeffrey T. Draper: Floating-point division and square root using a Taylor-series expansion algorithm. Microelectronics Journal 40(11): 1601-1605 (2009)
	2007
30		Riaz Naseer, Jeff Draper, Younes Boulghassoul, Sandeepan DasGupta, Art Witulski: Critical charge and set pulse widths for combinational logic in commercial 90nm cmos technology. ACM Great Lakes Symposium on VLSI 2007: 227-230
29		Sumit D. Mediratta, Jeffrey T. Draper: Performance Evaluation of Probe-Send Fault-tolerant Network-on-chip Router. ASAP 2007: 69-75
28		Riaz Naseer, Younes Boulghassoul, Jeff Draper, Sandeepan DasGupta, Art Witulski: Critical Charge Characterization for Soft Error Rate Modeling in 90nm SRAM. ISCAS 2007: 1879-1882
27		Sumit D. Mediratta, Jeffrey T. Draper: Characterization of a Fault-tolerant NoC Router. ISCAS 2007: 381-384
	2006
26		Rashed Zafar Bhatti, Monty Denneau, Jeff Draper: 2 Gbps SerDes design based on IBM Cu-11 (130nm) standard cell technology. ACM Great Lakes Symposium on VLSI 2006: 198-203
25		Tim Barrett, Sumit D. Mediratta, Taek-Jun Kwon, Ravinder Singh, Sachit Chandra, Jeff Sondeen, Jeffrey T. Draper: A double-data rate (DDR) processing-in-memory (PIM) device with wideword floating-point capability. ISCAS 2006
24		Riaz Naseer, Jeff Draper: DF-DICE: a scalable solution for soft error tolerant circuit design. ISCAS 2006
23		Rashed Zafar Bhatti, Monty Denneau, Jeff Draper: Phase measurement and adjustment of digital signals using random sampling technique. ISCAS 2006
	2005
22		Sumit D. Mediratta, Jeffrey T. Draper: Performance Analysis of User-Level PIM Communication in the Data IntensiVe Architecture (DIVA) System. HiPC 2005: 407-419
21		Sumit D. Mediratta, Craig S. Steele, Jeff Sondeen, Jeffrey T. Draper: An area-efficient and protected network interface for processing-in-memory systems. ISCAS (3) 2005: 2951-2954
20		Taek-Jun Kwon, Jeff Sondeen, Jeffrey T. Draper: Design trade-offs in floating-point unit implementation for embedded and processing-in-memory systems. ISCAS (4) 2005: 3331-3334
19		Jeffrey T. Draper, Tim Barrett, Jeff Sondeen, Sumit D. Mediratta, Chang Woo Kang, Ihn Kim, Gokhan Daglikoca: A Prototype Processing-In-Memory (PIM) Chip for the Data-Intensive Architecture (DIVA) System. VLSI Signal Processing 40(1): 73-84 (2005)
	2004
18		Taek-Jun Kwon, Joong-Seok Moon, Jeff Sondeen, Jeffrey T. Draper: A 0.18 µm implementation of a floating-point unit for a processing-in-memory system. ISCAS (2) 2004: 453-456
17		Sumit D. Mediratta, Jeff Sondeen, Jeffrey T. Draper: An Area-Efficient Router for the Data-Intensive Architecture (DIVA) System. VLSI Design 2004: 863-868
	2003
16		Joong-Seok Moon, William C. Athas, Sigfrid D. Soli, Jeffrey T. Draper, Peter A. Beerel: Voltage-pulse driven harmonic resonant rail drivers for low-power applications. IEEE Trans. VLSI Syst. 11(5): 762-777 (2003)
	2002
15		Jeffrey T. Draper, Jeff Sondeen, Sumit D. Mediratta, Ihn Kim: Implementation of a 32-bit RISC Processor for the Data-Intensive Architecture Processing-In-Memory Chip. ASAP 2002: 163-172
14		Jeffrey T. Draper, Jacqueline Chame, Mary W. Hall, Craig S. Steele, Tim Barrett, Jeff LaCoss, John J. Granacki, Jaewook Shin, Chun Chen, Chang Woo Kang, Ihn Kim Gokhan: The architecture of the DIVA processing-in-memory chip. ICS 2002: 14-25
	1999
13		Louis Luh, John Choma Jr., Jeffrey T. Draper: Area-Efficient Area Pad Design for High Pin-Count Chips. Great Lakes Symposium on VLSI 1999: 78-81
12		Louis Luh, John Choma Jr., Jeffrey T. Draper: A self-sensing tristate pad driver for control signals of multiple bus controllers. ISCAS (1) 1999: 447-450
	1998
11		Louis Luh, John Choma Jr., Jeffrey T. Draper: A Continuous-Time Switched-Current Sigma-Delta Modulator with Reduced Loop Delay. Great Lakes Symposium on VLSI 1998: 286-
10		Jeffrey T. Draper, Jay Block, Jeff Koller, Craig S. Steele: Thermal Management in Embedded Systems Using MEMS. IPPS/SPDP Workshops 1998: 900-901
9		Craig S. Steele, Jeffrey T. Draper, Jeff Koller: Safety Net: Secure Communications for Embedded High-Performance Computing. IPPS/SPDP Workshops 1998: 908-912
	1997
8		Craig S. Steele, Jeffrey T. Draper, Jeff Koller, C. LaCour: A Bus-Efficient Low-Latency Network Interface for the PDSS Multicomputer. HPDC 1997: 213-222
7		Jeffrey T. Draper, Fabrizio Petrini: Routing in Bidirectional k-ary n-cubes with the Red Rover Algorithm. PDPTA 1997: 1184-1193
	1996
6		Jeffrey T. Draper: The Red Rover Algorithm for Deadlock-Free Routing on Bidirectional Rings. PDPTA 1996: 345-354
	1994
5		Jeffrey T. Draper, Joydeep Ghosh: A Comprehensive Analytical Model for Wormhole Routng in Multicomputer Systems. J. Parallel Distrib. Comput. 23(2): 202-214 (1994)
4		Jeffrey T. Draper, Joydeep Ghosh: The M-Cache: A Message-Handling Mechanism for Multicomputer Systems. Parallel Computing 20(9): 1269-1288 (1994)
	1993
3		Joydeep Ghosh, Kelvin D. Goveas, Jeffrey T. Draper: Performance Evaluation of a Parallel I/O Subsystem for Hypercube Multicomputers. J. Parallel Distrib. Comput. 17(1-2): 90-106 (1993)
	1992
2		Jeffrey T. Draper, Joydeep Ghosh: Multipath E-Cube Algorithms (MECA) for Adaptive Wormhole Routing and Broadcasting in itk-ary itn-Cubes. IPPS 1992: 407-410
	1991
1		Jeffrey T. Draper, Joydeep Ghosh, William C. Athas: The M-cache: a message-retrieving mechanism for multicomputer systems. SPDP 1991: 258-265

Coauthor Index

1	William C. Athas	[1] [16]
2	Tim Barrett	[14] [19] [25]
3	Peter A. Beerel	[16]
4	Rashed Zafar Bhatti	[23] [26]
5	Jay Block	[10]
6	Younes Boulghassoul	[28] [30]
7	Jacqueline Chame	[14]
8	Sachit Chandra	[25]
9	Chun Chen	[14]
10	Woojin Choi	[37] [38] [40]
11	John Choma Jr.	[11] [12] [13]
12	Gokhan Daglikoca	[19]
13	Sandeepan DasGupta	[28] [30]
14	Monty Denneau	[23] [26]
15	Joydeep Ghosh	[1] [2] [3] [4] [5]
16	Ihn Kim Gokhan	[14]
17	Kelvin D. Goveas	[3]
18	John J. Granacki	[14]
19	Mahta Haghi	[33] [36]
20	Mary W. Hall	[14]
21	Chang Woo Kang	[14] [19]
22	Young Hoon Kang	[32] [34] [35] [37]
23	Ihn Kim	[15] [19]
24	Jefferey G. Koller (Jeff Koller)	[8] [9] [10]
25	Taek-Jun Kwon	[18] [20] [25] [31] [32] [35] [37]
26	Jeff LaCoss	[14]
27	C. LaCour	[8]
28	Louis Luh	[11] [12] [13]
29	Sumit D. Mediratta	[15] [17] [19] [21] [22] [25] [27] [29]
30	Joong-Seok Moon	[16] [18]
31	Riaz Naseer	[24] [28] [30]
32	Fabrizio Petrini	[7]
33	Timothy Mark Pinkston	[39]
34	Jaewook Shin	[14]
35	Ravinder Singh	[25]
36	Sigfrid D. Soli	[16]
37	Jeff Sondeen	[15] [17] [18] [19] [20] [21] [25] [34]
38	Craig S. Steele	[8] [9] [10] [14] [21]
39	Art Witulski	[28] [30]
40	Bilal Zafar	[39]

Colors in the list of coauthors

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