 | 2011 |
| 11 |  | Ehsan Rasekh,
Anestis Dounavis:
A model order reduction technique for nonlinear 3D interconnects using constraint variables.
CCECE 2011: 861-864 |
| 10 |  | Sourajeet Roy,
Anestis Dounavis:
Efficient Delay and Crosstalk Modeling of RLC Interconnects Using Delay Algebraic Equations.
IEEE Trans. VLSI Syst. 19(2): 342-346 (2011) |
| 9 |  | Sourajeet Roy,
Anestis Dounavis:
Transient Simulation of Distributed Networks Using Delay Extraction Based Numerical Convolution.
IEEE Trans. on CAD of Integrated Circuits and Systems 30(3): 364-373 (2011) |
| 2010 |
| 8 |  | Amir Beygi,
Anestis Dounavis:
Sensitivity Analysis of Lossy Multiconductor Transmission Lines Based on the Passive Method of Characteristics Macromodel.
IEEE Trans. on CAD of Integrated Circuits and Systems 29(8): 1290-1294 (2010) |
| 2009 |
| 7 |  | Sourajeet Roy,
Anestis Dounavis:
Closed-Form Delay and Crosstalk Models for RLC On-Chip Interconnects Using a Matrix Rational Approximation.
IEEE Trans. on CAD of Integrated Circuits and Systems 28(10): 1481-1492 (2009) |
| 2007 |
| 6 |  | Taha Amiralli,
Anestis Dounavis:
Macromodeling for Nonlinear Distributed Interconnect Networks.
ISCAS 2007: 1497-1500 |
| 2006 |
| 5 |  | V. A. Pothiwala,
Anestis Dounavis:
Efficient passive transmission line macromodeling algorithm using method of characteristics.
ISCAS 2006 |
| 4 |  | Rumi Zhang,
Graham A. Jullien,
Wei Wang,
Anestis Dounavis:
Passive reduced-order macromodeling algorithm for structure dynamics in MEMS systems.
ISCAS 2006 |
| 2005 |
| 3 |  | Natalie Nakhla,
Ramachandra Achar,
Michel S. Nakhla,
Anestis Dounavis:
Delay extraction based closed-form SPICE compatible passive macromodels for distributed transmission line interconnects.
ASP-DAC 2005: 1082-1085 |
| 2004 |
| 2 |  | Natalie Nakhla,
Anestis Dounavis,
Ramachandra Achar,
Michel S. Nakhla:
Fast sensitivity analysis of transmission line networks.
ISCAS (5) 2004: 121-124 |
| 2000 |
| 1 |  | Emad Gad,
Anestis Dounavis,
Michel S. Nakhla,
Ramachandra Achar:
Passive model order reduction of multiport distributed interconnects.
DAC 2000: 526-531 |