 | 2008 |
|---|
| 6 |       | Jie Zhou,
Yong Dou,
Yuanwu Lei,
Yazhuo Dong:
Hybrid-Mode Floating-Point FPGA CORDIC Co-processor.
ARC 2008: 254-259 |
| 5 | | Jie Zhou,
Yong Dou,
Yuanwu Lei,
Jinbo Xu,
Yazhuo Dong:
Double Precision Hybrid-Mode Floating-Point FPGA CORDIC Co-processor.
HPCC 2008: 182-189 |
| 4 | | Jie Zhou,
Yazhuo Dong,
Yong Dou,
Yuanwu Lei:
Dynamic Configurable Floating-Point FFT Pipelines and Hybrid-Mode CORDIC on FPGA.
ICESS 2008: 616-620 |
| 2007 |
|---|
| 3 | | Yazhuo Dong,
Yong Dou,
Jie Zhou:
Optimized Generation of Memory Structure in Compiling Window Operations onto Reconfigurable Hardware.
ARC 2007: 110-121 |
| 2 | | Yazhuo Dong,
Yong Dou:
A Parameterized Architecture Model in High Level Synthesis for Image Processing Applications.
ASP-DAC 2007: 523-528 |
| 2006 |
|---|
| 1 | | Jinhui Xu,
Guiming Wu,
Yong Dou,
Yazhuo Dong:
Designing a Coarse-Grained Reconfigurable Architecture Using Loop Self-Pipelining.
Asia-Pacific Computer Systems Architecture Conference 2006: 567-573 |
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