Rafal Dlugosz

Rafal Tomasz Dlugosz

	2012
25		Marta Kolasa, Rafal Dlugosz, Witold Pedrycz, Michal Szulc: A programmable triangular neighborhood function for a Kohonen self-organizing map implemented on chip. Neural Networks 25: 146-160 (2012)
	2011
24		Rafal Dlugosz, Marta Kolasa, Witold Pedrycz: Fisherman learning algorithm of the SOM realized in the CMOS technology. ESANN 2011
23		Rafal Dlugosz, Tomasz Talaska, Witold Pedrycz: Current-Mode Analog Adaptive Mechanism for Ultra-Low-Power Neural Networks. IEEE Trans. on Circuits and Systems 58-II(1): 31-35 (2011)
22		Rafal Dlugosz, Marta Kolasa, Witold Pedrycz, Michal Szulc: Parallel Programmable Asynchronous Neighborhood Mechanism for Kohonen SOM Implemented in CMOS Technology. IEEE Transactions on Neural Networks 22(12): 2091-2104 (2011)
21		Rafal Dlugosz, Pierre-André Farine, Kris Iniewski: Power efficient asynchronous multiplexer for X-ray sensors in medical imaging analog front-end electronics. Microelectronics Journal 42(1): 33-42 (2011)
	2010
20		Rafal Dlugosz, Marta Kolasa, Witold Pedrycz: Programmable triangular neighborhood functions of Kohonen Self-Organizing Maps realized in CMOS technology. ESANN 2010
19		Rafal Dlugosz, Tomasz Talaska, Witold Pedrycz, Ryszard Wojtyna: Realization of the conscience mechanism in CMOS implementation of winner-takes-all self-organizing neural networks. IEEE Transactions on Neural Networks 21(6): 961-971 (2010)
18		Rafal Dlugosz, Tomasz Talaska: Low power current-mode binary-tree asynchronous Min/Max circuit. Microelectronics Journal 41(1): 64-73 (2010)
17		Rafal Dlugosz, Witold Pedrycz: lukasiewicz fuzzy logic networks and their ultra low power hardware implementation. Neurocomputing 73(7-9): 1222-1234 (2010)
	2009
16		Rafal Dlugosz, Marta Kolasa: New Fast Training Algorithm Suitable for Hardware Kohonen Neural Networks Designed for Analysis of Biomedical Signals. BIODEVICES 2009: 364-367
15		Rafal Dlugosz, Vincent C. Gaudet: An Asynchronous Programmable Parallel 2-D Image Filter CMOS Ic Based on the Gilbert Vector Multiplier. BIODEVICES 2009: 46-51
14		Marta Kolasa, Rafal Dlugosz: Hardware Implementation Issues of the Neighborhood Mechanism in Kohonen Self Organized Feature Maps. ESANN 2009
13		Rafal Dlugosz, Witold Pedrycz: Lukasiewicz fuzzy logic networks and their ultra low power hardware implementation. ESANN 2009
12		Rafal Dlugosz, Krzysztof Iniewski: Programmable Switched Capacitor Finite Impulse Response Filter with Circular Memory Implemented in CMOS 0.18 µm Technology. Signal Processing Systems 56(2-3): 295-306 (2009)
	2008
11		Marta Kolasa, Rafal Dlugosz: Parallel asynchronous neighborhood mechanism for WTM Kohonen network implemented in CMOS technology. ESANN 2008: 331-336
10		Tomasz Talaska, Rafal Dlugosz: Initialization mechanism in Kohonen neural network implemented in CMOS technology. ESANN 2008: 337-342
9		Rafal Dlugosz, Kris Iniewski: Power and area efficient circular-memory switched-capacitor FIR baseband filter for WCDMA/GSM. ISCAS 2008: 2326-2329
8		Rafal Dlugosz, Vincent C. Gaudet: Current-mode memory cell with power down phase for discrete time analog iterative decoders. ISCAS 2008: 748-751
	2007
7		Tomasz Talaska, Rafal Dlugosz, Witold Pedrycz: Adaptive Weight Change Mechanism for Kohonens's Neural Network Implemented in CMOS 0.18 um Technology. ESANN 2007: 151-156
6		Rafal Tomasz Dlugosz, Krzysztof Iniewski: Flexible Architecture of Ultra-Low-Power Current-Mode Interleaved Successive Approximation Analog-to-Digital Converter for Wireless Sensor Networks. VLSI Design 2007: (2007)
	2006
5		Rafal Dlugosz, Krzysztof Iniewski, Tomasz Talaska: 0.35 m 22W Multiphase Programmable Clock Generator for Circular Memory SC FIR Filter For Wireless Sensor Applications. SiPS 2006: 157-160
4		Keith Boyle, Sai Mohan Kilambi, Rafal Dlugosz, Kris Iniewski, Vincent C. Gaudet: An Examination of the Effect of Feature Size Scaling on Effective Power Consumption in Analog to Digital Converters. SiPS 2006: 194-199
3		Tomasz Talaska, Ryszard Wojtyna, Rafal Dlugosz, Krzysztof Iniewski, Witold Pedrycz: Analog-Counter-Based Conscience Mechanism in Kohonen's Neural Network Implemented in CMOS 0.18 m Technology. SiPS 2006: 416-421
2		A. Dabrowski, Rafal Dlugosz, P. Pawlowski: Integrated CMOS GSM baseband channel selecting filters realized using switched capacitor finite impulse response technique. Microelectronics Reliability 46(5-6): 949-958 (2006)
	2005
1		Krzysztof Iniewski, Valery Axelrad, Andrei Shibkov, Artur Balasinski, Sebastian Magierowski, Rafal Dlugosz, A. Dabrowski: 3.125 Gb/s power efficient line driver with 2-level pre-emphasis and 2 kV HBM ESD protection. ISCAS (2) 2005: 1154-1157

Coauthor Index

1	Valery Axelrad	[1]
2	Artur Balasinski	[1]
3	Keith Boyle	[4]
4	A. Dabrowski	[1] [2]
5	Pierre-André Farine	[21]
6	Vincent C. Gaudet	[4] [8] [15]
7	Krzysztof Iniewski (Kris Iniewski)	[1] [3] [4] [5] [6] [9] [12] [21]
8	Sai Mohan Kilambi	[4]
9	Marta Kolasa	[11] [14] [16] [20] [22] [24] [25]
10	Sebastian Magierowski	[1]
11	P. Pawlowski	[2]
12	Witold Pedrycz	[3] [7] [13] [17] [19] [20] [22] [23] [24] [25]
13	Andrei Shibkov	[1]
14	Michal Szulc	[22] [25]
15	Tomasz Talaska	[3] [5] [7] [10] [18] [19] [23]
16	Ryszard Wojtyna	[3] [19]

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