Benoît Dupont de Dinechin

	2012
18		Dibyendu Das, Benoît Dupont de Dinechin, Ramakrishna Upadrasta: Efficient liveness computation using merge sets and DJ-graphs. TACO 8(4): 27 (2012)
	2011
17		Benoit Boissinot, Florian Brandner, Alain Darte, Benoît Dupont de Dinechin, Fabrice Rastello: A Non-iterative Data-Flow Algorithm for Computing Liveness Sets in Strict SSA Programs. APLAS 2011: 137-154
16		Sid Ahmed Ali Touati, Frederic Brault, Karine Deschinkel, Benoît Dupont de Dinechin: Efficient Spilling Reduction for Software Pipelined Loops in Presence of Multiple Register Types in Embedded VLIW Processors. ACM Trans. Embedded Comput. Syst. 10(4): 47 (2011)
	2009
15		Benoit Boissinot, Alain Darte, Fabrice Rastello, Benoît Dupont de Dinechin, Christophe Guillon: Revisiting Out-of-SSA Translation for Correctness, Code Quality and Efficiency. CGO 2009: 114-125
	2008
14		Benoit Boissinot, Sebastian Hack, Daniel Grund, Benoît Dupont de Dinechin, Fabrice Rastello: Fast liveness checking for ssa-form programs. CGO 2008: 35-44
13		Benoît Dupont de Dinechin: Inter-block Scoreboard Scheduling in a JIT Compiler for VLIW Processors. Euro-Par 2008: 370-381
	2006
12		Florent Blachot, Benoît Dupont de Dinechin, Guillaume Huard: SCAN: A Heuristic for Near-Optimal Software Pipelining. Euro-Par 2006: 289-298
	2005
11		Jean-Michel Muller, Arnaud Tisserand, Benoît Dupont de Dinechin, Christophe Monat: Division by Constant for the ST100 DSP Microprocessor. IEEE Symposium on Computer Arithmetic 2005: 124-130
	2000
10		Benoît Dupont de Dinechin, François de Ferrière, Christophe Guillon, Artour Stoutchinin: Code generator optimizations for the ST120 DSP-MCU core. CASES 2000: 93-102
	1999
9		Benoît Dupont de Dinechin: Extending Modulo Scheduling with Memory Reference Merging. CC 1999: 274-287
	1997
8		Robert W. Numrich, Jon L. Steidel, Brian H. Johnson, Benoît Dupont de Dinechin, Gary Elsesser, Greg Fischer, Tom MacDonald: Definition of the F-- Extension to Fortran 90. LCPC 1997: 292-306
7		Benoît Dupont de Dinechin: A Unified Software Pipeline Construction Scheme for Modulo Scheduled Loops. LCPC 1997: 382-393
6		Benoît Dupont de Dinechin: A Unified Software Pipeline Construction Scheme for Modulo Scheduled Loops. PaCT 1997: 189-200
	1996
5		Benoît Dupont de Dinechin: Parametric Computation of Margins and of Minimum Cumulative Register Lifetime Dates. LCPC 1996: 231-245
	1995
4		Benoît Dupont de Dinechin: Insertion Scheduling: An Alternative to List Scheduling for Modulo Schedulers. LCPC 1995: 31-45
	1994
3		Benoît Dupont de Dinechin: An Introduction to Simplex Scheduling. IFIP PACT 1994: 327-330
	1992
2		Benoît Dupont de Dinechin: StaCS: a Static Control Superscalar architecture. MICRO 1992: 282-291
	1991
1		Benoît Dupont de Dinechin: A ultra fast Euclidean division algorithm for prime memory systems. SC 1991: 56-65

Coauthor Index

1	Florent Blachot	[12]
2	Benoit Boissinot	[14] [15] [17]
3	Florian Brandner	[17]
4	Frederic Brault	[16]
5	Alain Darte	[15] [17]
6	Dibyendu Das	[18]
7	Karine Deschinkel	[16]
8	Gary Elsesser	[8]
9	François de Ferrière	[10]
10	Greg Fischer	[8]
11	Daniel Grund	[14]
12	Christophe Guillon	[10] [15]
13	Sebastian Hack	[14]
14	Guillaume Huard	[12]
15	Brian H. Johnson	[8]
16	Tom MacDonald	[8]
17	Christophe Monat	[11]
18	Jean-Michel Muller	[11]
19	Robert W. Numrich	[8]
20	Fabrice Rastello	[14] [15] [17]
21	Jon L. Steidel	[8]
22	Arthur Stoutchinin (Artour Stoutchinin)	[10]
23	Arnaud Tisserand	[11]
24	Sid Ahmed Ali Touati	[16]
25	Ramakrishna Upadrasta	[18]

Colors in the list of coauthors

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