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| 2010 | ||
|---|---|---|
| 2 | Matthias Függer, Andreas Dielacher, Ulrich Schmid: How to Speed-Up Fault-Tolerant Clock Generation in VLSI Systems-on-Chip via Pipelining. EDCC 2010: 230-239 | |
| 2009 | ||
| 1 | Andreas Dielacher, Matthias Függer, Ulrich Schmid: Brief announcement: how to speed-up fault-tolerant clock generation in VLSI systems-on-chip via pipelining. PODC 2009: 276-277 | |
| 1 | Matthias Függer | [1] [2] |
| 2 | Ulrich Schmid | [1] [2] |
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