 | 2012 |
|---|
| 9 |       | Nilanjan Chattaraj,
Anindya Sundar Dhar:
Random Access Analog Memory (RA2M) for Video Signal Application.
VLSI Design 2012: 39-44 |
| 2010 |
|---|
| 8 | | Kaushik Bhattacharyya,
Rakesh Biswas,
Anindya Sundar Dhar,
Swapna Banerjee:
Architectural design and FPGA implementation of radix-4 CORDIC processor.
Microprocessors and Microsystems - Embedded Hardware Design 34(2-4): 96-101 (2010) |
| 2006 |
|---|
| 7 | | C. Thakkar,
Anindya Sundar Dhar:
Sampled analog architecture for 2-D DCT.
ISCAS 2006 |
| 2005 |
|---|
| 6 | | Arindam Basu,
Anindya Sundar Dhar:
Design Issues in Switched Capacitor Ladder Filters.
VLSI Design 2005: 862-865 |
| 5 | | Ayan Banerjee,
Anindya Sundar Dhar:
Novel architecture for QAM modulator-demodulator and its generalization to multicarrier modulation.
Microprocessors and Microsystems 29(7): 351-357 (2005) |
| 2004 |
|---|
| 4 |  | Arindam Basu,
Ashis Kumar Mal,
Anindya Sundar Dhar:
Digital controlled analog architecture for DCT and DST using capacitor switching.
ISCAS (2) 2004: 309-312 |
| 3 | | Ashis Kumar Mal,
Arindam Basu,
Anindya Sundar Dhar:
Sampled analog architecture for DCT and DST.
ISCAS (2) 2004: 825-828 |
| 2 | | Ashis Kumar Mal,
Anindya Sundar Dhar:
Analog VLSI Architecture for Discrete Cosine Transform using Dynamic Switched Capacitors.
VLSI Design 2004: 666-669 |
| 2001 |
|---|
| 1 | | Ayan Banerjee,
Anindya Sundar Dhar,
Swapna Banerjee:
FPGA realization of a CORDIC based FFT processor for biomedical signal processing.
Microprocessors and Microsystems 25(3): 131-142 (2001) |
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