A. S. Dhar

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2011

4 Boppana Lakshmi, A. S. Dhar: VLSI architecture for low latency radix-4 CORDIC. Computers & Electrical Engineering 37(6): 1032-1042 (2011)

2010

3 Boppana Lakshmi, A. S. Dhar: CORDIC Architectures: A Survey. VLSI Design 2010: (2010)

2008

2 Kailash Chandra Ray, A. S. Dhar: High Throughput VLSI Architecture for Blackman Windowing in Real Time Spectral Analysis. JCP 3(5): 54-59 (2008)

2001

1 Koushik Maharatna, A. S. Dhar, Swapna Banerjee: A VLSI array architecture for realization of DFT, DHT, DCT and DST. Signal Processing 81(9): 1813-1822 (2001)

	2011
4		Boppana Lakshmi, A. S. Dhar: VLSI architecture for low latency radix-4 CORDIC. Computers & Electrical Engineering 37(6): 1032-1042 (2011)
	2010
3		Boppana Lakshmi, A. S. Dhar: CORDIC Architectures: A Survey. VLSI Design 2010: (2010)
	2008
2		Kailash Chandra Ray, A. S. Dhar: High Throughput VLSI Architecture for Blackman Windowing in Real Time Spectral Analysis. JCP 3(5): 54-59 (2008)
	2001
1		Koushik Maharatna, A. S. Dhar, Swapna Banerjee: A VLSI array architecture for realization of DFT, DHT, DCT and DST. Signal Processing 81(9): 1813-1822 (2001)

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