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Nagu R. Dhanwada Coauthor index pubzone.org

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17Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLReinaldo A. Bergamaschi, Guoling Han, Alper Buyuktosunoglu, Hiren D. Patel, Indira Nair, Gero Dittmann, Geert Janssen, Nagu R. Dhanwada, Zhigang Hu, Pradip Bose, John A. Darringer: Exploring power management in multi-core systems. ASP-DAC 2008: 708-713
2007
16Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLReinaldo A. Bergamaschi, Indira Nair, Gero Dittmann, Hiren D. Patel, Geert Janssen, Nagu R. Dhanwada, Alper Buyuktosunoglu, Emrah Acar, Gi-Joon Nam, Dorothy Kucar, Pradip Bose, John A. Darringer, Guoling Han: Performance modeling for early analysis of multi-core systems. CODES+ISSS 2007: 209-214
2006
15Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLIng-Chao Lin, Suresh Srinivasan, Narayanan Vijaykrishnan, Nagu R. Dhanwada: Transaction Level Error Susceptibility Model for Bus Based SoC Architectures. ISQED 2006: 775-780
14Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLNagu R. Dhanwada, Alex Doboli, Adrián Núñez-Aldana, Ranga Vemuri: Hierarchical constraint transformation based on genetic optimization for analog system synthesis. Integration 39(3): 267-290 (2006)
2005
13Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLNagu R. Dhanwada, Ing-Chao Lin, Vijaykrishnan Narayanan: A power estimation methodology for systemC transaction level models. CODES+ISSS 2005: 142-147
12Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLWei-Lun Hung, Greg M. Link, Yuan Xie, Narayanan Vijaykrishnan, Nagu R. Dhanwada, John Conner: Temperature-Aware Voltage Islands Architecting in System-on-Chip Design. ICCD 2005: 689-696
11Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLNagu R. Dhanwada, Reinaldo A. Bergamaschi, William W. Dungan, Indira Nair, Paul Gramann, William E. Dougherty, Ing-Chao Lin: Transaction-level modeling for architectural and power analysis of PowerPC and CoreConnect-based systems. Design Autom. for Emb. Sys. 10(2-3): 105-125 (2005)
2004
10Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLJingcao Hu, Youngsoo Shin, Nagu R. Dhanwada, Radu Marculescu: Architecting voltage islands in core-based system-on-a-chip designs. ISLPED 2004: 180-185
9Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLAlex Doboli, Nagu R. Dhanwada, Adrián Núñez-Aldana, Ranga Vemuri: A two-layer library-based approach to synthesis of analog systems from VHDL-AMS specifications. ACM Trans. Design Autom. Electr. Syst. 9(2): 238-271 (2004)
2003
8Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLShyam Ramji, Nagu R. Dhanwada: Design topology aware physical metrics for placement analysis. ACM Great Lakes Symposium on VLSI 2003: 186-191
7Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLReinaldo A. Bergamaschi, Youngsoo Shin, Nagu R. Dhanwada, Subhrajit Bhattacharya, William E. Dougherty, Indira Nair, John A. Darringer, Sarala Paliwal: SEAS: a system for early analysis of SoCs. CODES+ISSS 2003: 150-155
1999
6Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLNagu R. Dhanwada, Adrián Núñez-Aldana, Ranga Vemuri: Automatic Constraint Transformation with Integrated Parameter Space Exploration in Analog System Synthesis. ASP-DAC 1999: 153-156
5Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLAlex Doboli, Adrián Núñez-Aldana, Nagu R. Dhanwada, Sree Ganesan, Ranga Vemuri: Behavioral Synthesis of Analog Systems Using Two-layered Design Space Exploration. DAC 1999: 951-957
4Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLNagu R. Dhanwada, Adrián Núñez-Aldana, Ranga Vemuri: Hierarchical Constraint Transformation Using Directed Interval Search for Analog System Synthesis. DATE 1999: 328-
3Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLNagu R. Dhanwada, Adrián Núñez-Aldana, Ranga Vemuri: A genetic approach to simultaneous parameter space exploration and constraint transformation in analog synthesis. ISCAS (6) 1999: 362-365
2no EE pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLNagu R. Dhanwada, Adrián Núñez-Aldana, Ranga Vemuri: Component Characterization and Constraint Transformation Based on Directed Intervals for Analog Synthesis. VLSI Design 1999: 589-596
1998
1Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLNagu R. Dhanwada, Ranga Vemuri: Constraint Allocation in Analog System Synthesis. VLSI Design 1998: 253-258

Coauthor Index

1Emrah Acar [16]
2Reinaldo A. Bergamaschi [7] [11] [16] [17]
3Subhrajit Bhattacharya [7]
4Pradip Bose [16] [17]
5Alper Buyuktosunoglu [16] [17]
6John Conner [12]
7John A. Darringer [7] [16] [17]
8Gero Dittmann [16] [17]
9Alex Doboli (Alexa Doboli) [5] [9] [14]
10William E. Dougherty [7] [11]
11William W. Dungan [11]
12Sree Ganesan [5]
13Paul Gramann [11]
14Guoling Han [16] [17]
15Jingcao Hu [10]
16Zhigang Hu [17]
17Wei-Lun Hung [12]
18Geert Janssen [16] [17]
19Dorothy Kucar [16]
20Ing-Chao Lin [11] [13] [15]
21Greg M. Link [12]
22Radu Marculescu [10]
23Indira Nair [7] [11] [16] [17]
24Gi-Joon Nam [16]
25Adrián Núñez-Aldana [2] [3] [4] [5] [6] [9] [14]
26Sarala Paliwal [7]
27Hiren D. Patel [16] [17]
28Shyam Ramji [8]
29Youngsoo Shin [7] [10]
30Suresh Srinivasan [15]
31Ranga Vemuri [1] [2] [3] [4] [5] [6] [9] [14]
32Narayanan Vijaykrishnan (Vijaykrishnan Narayanan) [12] [13] [15]
33Yuan Xie [12]

Colors in the list of coauthors

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