Jean Lou Desbarbieux

	2012
7		Mathieu Rosiere, Jean Lou Desbarbieux, Nathalie Drach, Franck Wajsbürt: An out-of-order superscalar processor on FPGA: The ReOrder Buffer design. DATE 2012: 1549-1554
	2011
6		Mathieu Rosiere, Jean Lou Desbarbieux, Nathalie Drach, Franck Wajsbürt: Morpheo: A high-performance processor generator for a FPGA implementation. DASIP 2011: 27-34
	2010
5		Sami Taktak, Emmanuelle Encrenaz, Jean Lou Desbarbieux: A Polynomial Algorithm to Prove Deadlock-Freeness of Wormhole Networks. PDP 2010: 121-128
	2008
4		Sami Taktak, Jean Lou Desbarbieux, Emmanuelle Encrenaz: A tool for automatic detection of deadlock in wormhole networks on chip. ACM Trans. Design Autom. Electr. Syst. 13(1): (2008)
	2004
3		M. Diaby, Matthieu Tuna, Jean Lou Desbarbieux, Franck Wajsbürt: High Level Synthesis Methodology from C to FPGA Used for a Network Protocol Communication. IEEE International Workshop on Rapid System Prototyping 2004: 103-108
	2003
2		Vincent Beaudenon, Emmanuelle Encrenaz, Jean Lou Desbarbieux: Design Validation of ZCSP with SPIN. ACSD 2003: 102-110
	2001
1		Jean Lou Desbarbieux, Olivier Glück, Amal Zerrouki, Alexandre Fenyo, Alain Greiner, Franck Wajsbürt, Cyril Spasevski, Fabrício Silva, E. Dreyfus: Protocol and Performance Analysis of the MPC Parallel Computer. IPDPS 2001: 52

Coauthor Index

1	Vincent Beaudenon	[2]
2	M. Diaby	[3]
3	Nathalie Drach-Temam (Nathalie Drach)	[6] [7]
4	E. Dreyfus	[1]
5	Emmanuelle Encrenaz-Tiphène (Emmanuelle Encrenaz)	[2] [4] [5]
6	Alexandre Fenyo	[1]
7	Olivier Glück	[1]
8	Alain Greiner	[1]
9	Mathieu Rosiere	[6] [7]
10	Fabrício Silva	[1]
11	Cyril Spasevski	[1]
12	Sami Taktak	[4] [5]
13	Matthieu Tuna	[3]
14	Franck Wajsbürt	[1] [3] [6] [7]
15	Amal Zerrouki	[1]

Last update Tue May 29 20:41:18 2012 CET by the DBLP Team — Data released under the ODC-BY 1.0 license — See also our legal information page