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| 1999 | ||
|---|---|---|
| 1 | Siddika Berna Örs, Ahmet Dervisoglu: Modeling Bit Multiplication Blocks for DSP Applications Using VHDL. EUROMICRO 1999: 1402-1405 | |
| 1 | Siddika Berna Ors Yalcin (Siddika Berna Örs) | [1] |
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