 | 2012 |
| 8 |  | John F. Bulzacchelli,
Zeynep Toprak Deniz,
Todd M. Rasmus,
Joseph A. Iadanza,
William L. Bucossi,
Seongwon Kim,
Rafael Blanco,
Carrie E. Cox,
Mohak Chhabra,
Christopher D. LeBlanc,
Christian L. Trudeau,
Daniel J. Friedman:
Dual-Loop System of Distributed Microregulators With High DC Accuracy, Load Response Time Below 500 ps, and 85-mV Dropout Voltage.
J. Solid-State Circuits 47(4): 863-874 (2012) |
| 2009 |
| 7 |  | John F. Bulzacchelli,
Timothy O. Dickson,
Zeynep Toprak Deniz,
Herschel A. Ainspan,
Benjamin D. Parker,
Michael P. Beakes,
Sergey V. Rylov,
Daniel J. Friedman:
A 78mW 11.1Gb/s 5-tap DFE receiver with digitally calibrated current-integrating summers in 65nm CMOS.
ISSCC 2009: 368-369 |
| 6 |  | Alexander Rylyakov,
José A. Tierno,
Herschel A. Ainspan,
Jean-Olivier Plouchart,
John F. Bulzacchelli,
Zeynep Toprak Deniz,
Daniel J. Friedman:
Bang-bang digital PLLs at 11 and 20GHz with sub-200fs integrated jitter for high-speed serial communication applications.
ISSCC 2009: 94-95 |
| 5 |  | Francesco Regazzoni,
Thomas Eisenbarth,
Axel Poschmann,
Johann Großschädl,
Frank K. Gürkaynak,
Marco Macchetti,
Zeynep Toprak Deniz,
Laura Pozzi,
Christof Paar,
Yusuf Leblebici,
Paolo Ienne:
Evaluating Resistance of MCML Technology to Power Analysis Attacks Using a Simulation-Based Methodology.
Transactions on Computational Science 4: 230-243 (2009) |
| 2007 |
| 4 |  | Francesco Regazzoni,
Stéphane Badel,
Thomas Eisenbarth,
Johann Großschädl,
Axel Poschmann,
Zeynep Toprak Deniz,
Marco Macchetti,
Laura Pozzi,
Christof Paar,
Yusuf Leblebici,
Paolo Ienne:
A Simulation-Based Methodology for Evaluating the DPA-Resistance of Cryptographic Functional Units with Application to CMOS and MCML Technologies.
ICSAMOS 2007: 209-214 |
| 2006 |
| 3 |  | Zeynep Toprak Deniz,
Yusuf Leblebici,
Eric A. Vittoz:
Configurable On-Line Global Energy Optimization in Multi-Core Embedded Systems Using Principles of Analog Computation.
VLSI-SoC 2006: 379-384 |
| 2005 |
| 2 |  | Zeynep Toprak Deniz,
Yusuf Leblebici:
Low-power current mode logic for improved DPA-resistance in embedded systems.
ISCAS (2) 2005: 1059-1062 |
| 2003 |
| 1 |  | Zeynep Toprak Deniz,
Yusuf Leblebici:
Design and realization of a modular 200 MSample/s 12-bit pipelined A/D converter block using deep-submicron digital CMOS technology.
ISCAS (1) 2003: 841-844 |