 | 2012 |
| 15 |  | Baljit Kaur,
Sandeep Vundavalli,
S. K. Manhas,
S. Dasgupta,
Bulusu Anand:
An accurate current source model for CMOS based combinational logic cell.
ISQED 2012: 561-565 |
| 2011 |
| 14 |  | Arnab K. Biswas,
A. Bulusu,
S. Dasgupta:
A Proposed Output Buffer at 90 nm Technology with Minimum Signal Switching Noise at 83.3MHz.
ISVLSI 2011: 108-113 |
| 13 |  | E. Xu,
Z. Ding,
S. Dasgupta:
Source Localization in Wireless Sensor Networks From Signal Time-of-Arrival Measurements.
IEEE Transactions on Signal Processing 59(6): 2887-2897 (2011) |
| 12 |  | W. Song,
D. Edwards,
Z. Liu,
S. Dasgupta:
Routing of asynchronous Clos networks.
IET Computers & Digital Techniques 5(6): 452-467 (2011) |
| 11 |  | Balwinder Raj,
Jatin Mitra,
Deepak Kumar Bihani,
V. Rangharajan,
A. K. Saxena,
S. Dasgupta:
Process Variation Tolerant FinFET Based Robust Low Power SRAM Cell Design at 32 nm Technology.
J. Low Power Electronics 7(2): 163-171 (2011) |
| 10 |  | Jitendra Kanungo,
S. Dasgupta:
An Efficient Single Phase Adiabatic Logic and Its Application to Combinational and Sequential Design.
J. Low Power Electronics 7(3): 381-392 (2011) |
| 9 |  | S. S. Rathod,
A. K. Saxena,
S. Dasgupta:
Electrical performance study of 25 nm Omega-FinFET under the influence of gamma radiation: A 3D simulation.
Microelectronics Journal 42(1): 165-172 (2011) |
| 8 |  | S. K. Vishvakarma,
V. Komal Kumar,
A. K. Saxena,
S. Dasgupta:
Modeling and estimation of edge direct tunneling current for nanoscale metal gate (Hf/AlNx) symmetric double gate MOSFET.
Microelectronics Journal 42(5): 688-692 (2011) |
| 7 |  | S. S. Rathod,
A. K. Saxena,
S. Dasgupta:
A low-noise, process-variation-tolerant double-gate FinFET based sense amplifier.
Microelectronics Reliability 51(4): 773-780 (2011) |
| 2010 |
| 6 |  | S. S. Rathod,
A. K. Saxena,
S. Dasgupta:
Robust Double Gate FinFET Based Sense Amplifier Design Using Independent Gate Control.
J. Low Power Electronics 6(4): 533-544 (2010) |
| 5 |  | S. S. Rathod,
A. K. Saxena,
S. Dasgupta:
A proposed DG-FinFET based SRAM cell design with RadHard capabilities.
Microelectronics Reliability 50(8): 1181-1188 (2010) |
| 2009 |
| 4 |  | Y. K. Sudharshan,
D. Sreenu,
A. K. Saxena,
S. Dasgupta:
Design of Low Power Adiabatic SRAM Using DTGAL, CPAL and ACPL: A Comparative Study.
J. Low Power Electronics 5(1): 40-49 (2009) |
| 2002 |
| 3 |  | P. P. Mohanlal,
M. R. Kaimal,
S. Dasgupta:
Exact Fuzzy Modeling and Optimal control of a Launch Vehicle in the atmospheric phase.
ICARCV 2002: 1275-1280 |
| 2001 |
| 2 |  | Michael Collins,
S. Dasgupta,
Robert E. Schapire:
A Generalization of Principal Components Analysis to the Exponential Family.
NIPS 2001: 617-624 |
| 1995 |
| 1 |  | B. D. O. Anderson,
F. Kraus,
M. Mansour,
S. Dasgupta:
Easily testable sufficient conditions for the robust stability of systems with multilinear parameter dependence.
Automatica 31(1): 25-40 (1995) |