![]() | ![]() |
| 2012 | ||
|---|---|---|
| 25 | Pradip Bose, Alper Buyuktosunoglu, John A. Darringer, Meeta Sharma Gupta, Michael B. Healy, Hans M. Jacobson, Indira Nair, Jude A. Rivers, Jeonghee Shin, Augusto Vega, Alan J. Weger: Power management of multi-core chips: Challenges and pitfalls. DATE 2012: 977-982 | |
| 2011 | ||
| 24 | Jeonghee Shin, John A. Darringer, Guojie Luo, Alan J. Weger, C. L. Johnson: Early chip planning cockpit. DATE 2011: 863-866 | |
| 23 | Jeonghee Shin, John A. Darringer, Guojie Luo, Merav Aharoni, Alexey Lvov, Gi-Joon Nam, Michael B. Healy: Floorplanning challenges in early chip planning. SoCC 2011: 388-393 | |
| 2010 | ||
| 22 | Pradip Bose, Alper Buyuktosunoglu, Chen-Yong Cher, John A. Darringer, Meeta Sharma Gupta, Hendrik F. Hamann, Hans M. Jacobson, Prabhakar Kudva, Eren Kursun, Niti Madan, Indira Nair, Jude A. Rivers, Jeonghee Shin, Alan J. Weger, Victor V. Zyuban: Power-efficient, reliable microprocessor architectures: modeling and design methods. ACM Great Lakes Symposium on VLSI 2010: 299-304 | |
| 2008 | ||
| 21 | Reinaldo A. Bergamaschi, Guoling Han, Alper Buyuktosunoglu, Hiren D. Patel, Indira Nair, Gero Dittmann, Geert Janssen, Nagu R. Dhanwada, Zhigang Hu, Pradip Bose, John A. Darringer: Exploring power management in multi-core systems. ASP-DAC 2008: 708-713 | |
| 20 | David Yeh, Li-Shiuan Peh, Shekhar Borkar, John A. Darringer, Anant Agarwal, Wen-mei W. Hwu: Thousand-Core Chips [Roundtable]. IEEE Design & Test of Computers 25(3): 272-278 (2008) | |
| 2007 | ||
| 19 | Reinaldo A. Bergamaschi, Indira Nair, Gero Dittmann, Hiren D. Patel, Geert Janssen, Nagu R. Dhanwada, Alper Buyuktosunoglu, Emrah Acar, Gi-Joon Nam, Dorothy Kucar, Pradip Bose, John A. Darringer, Guoling Han: Performance modeling for early analysis of multi-core systems. CODES+ISSS 2007: 209-214 | |
| 18 | John A. Darringer: Multi-Core Design Automation Challenges. DAC 2007: 760-764 | |
| 2006 | ||
| 17 | Jeff Parkhurst, John A. Darringer, Bill Grundmann: From single core to multi-core: preparing for a new exponential. ICCAD 2006: 67-72 | |
| 2005 | ||
| 16 | Subhrajit Bhattacharya, John A. Darringer, Daniel L. Ostapko, Youngsoo Shin: A Mask Reuse Methodology for Reducing System-on-a-Chip Cost. ISQED 2005: 482-487 | |
| 2004 | ||
| 15 | Shishpal Rawat, William H. Joyner Jr., John A. Darringer, Daniel Gajski, Pat O. Pistilli, Hugo De Man, Carl Harris, James Solomon: Were the good old days all that good?: EDA then and now. DAC 2004: 543 | |
| 2003 | ||
| 14 | Reinaldo A. Bergamaschi, Youngsoo Shin, Nagu R. Dhanwada, Subhrajit Bhattacharya, William E. Dougherty, Indira Nair, John A. Darringer, Sarala Paliwal: SEAS: a system for early analysis of SoCs. CODES+ISSS 2003: 150-155 | |
| 2002 | ||
| 13 | John A. Darringer, Reinaldo A. Bergamaschi, Subhrajit Bhattacharya, Daniel Brand, Andreas Herkersdorf, Joseph K. Morrell, Indira Nair, Patricia Sagmeister, Youngsoo Shin: Early analysis tools for system-on-a-chip design. IBM Journal of Research and Development 46(6): 691-708 (2002) | |
| 2001 | ||
| 12 | Steven E. Schulz, Georgia Marszalek, Greg Hinckley, Greg Spirakis, Karen Vahtra, John A. Darringer, J. George Janac, Handel H. Jones: Panel: What Drives EDA Innovation? DAC 2001: 790-791 | |
| 2000 | ||
| 11 | John A. Darringer, Daniel Brand, John V. Gerbi, William H. Joyner Jr., Louise Trevillyan: LSS: A system for production logic synthesis. IBM Journal of Research and Development 44(1): 157-166 (2000) | |
| 10 | John A. Darringer, Evan E. Davidson, David J. Hathaway, Bernd Koenemann, Mark A. Lavin, Joseph K. Morrell, Khalid Rahmat, Wolfgang Roesner, Erich C. Schanzenbach, Gustavo Tellez, Louise Trevillyan: EDA in IBM: past, present, and future. IEEE Trans. on CAD of Integrated Circuits and Systems 19(12): 1476-1497 (2000) | |
| 1993 | ||
| 9 | John A. Darringer: Where in the World Should CAD Software be Made? (Panel Abstract). DAC 1993: 742 | |
| 1989 | ||
| 8 | John A. Darringer: Advanced Design Automation in Industry. IFIP Congress 1989: 527 | |
| 1985 | ||
| 7 | John A. Darringer, Daniel Brand, William H. Joyner Jr., Louise Trevillyan, John V. Gerbi: Production logic synthesis. ACM Conference on Computer Science 1985: 13-16 | |
| 1984 | ||
| 6 | John A. Darringer: Automated Logic Synthesis. VLSI Engineering 1984: 177-186 | |
| 5 | John A. Darringer, Daniel Brand, John V. Gerbi, William H. Joyner Jr., Louise Trevillyan: LSS: A System for Production Logic Synthesis. IBM Journal of Research and Development 28(5): 537-545 (1984) | |
| 1981 | ||
| 4 | John A. Darringer, William H. Joyner Jr., C. Leonard Berman, Louise Trevillyan: Logic Synthesis Through Local Transformations. IBM Journal of Research and Development 25(4): 272-280 (1981) | |
| 1980 | ||
| 3 | John A. Darringer, William H. Joyner Jr.: A new look at logic synthesis. DAC 1980: 543-549 | |
| 1979 | ||
| 2 | John A. Darringer: The application of program verification techniques to hardware verification. DAC 1979: 375-381 | |
| 1968 | ||
| 1 | John A. Darringer: A language for the description of digital computer processors. DAC 1968 | |
Colors in the list of coauthors
Last update Tue May 29 20:41:18 2012 CET by the DBLP Team —
Data released under the ODC-BY 1.0 license — See also our legal information page