Jean-Luc Danger

	2012
61		Cédric Murdica, Sylvain Guilley, Jean-Luc Danger, Philippe Hoogvorst, David Naccache: Same Values Power Analysis Using Special Points on Elliptic Curves. COSADE 2012: 183-198
60		Houssem Maghrebi, Emmanuel Prouff, Sylvain Guilley, Jean-Luc Danger: A First-Order Leak-Free Masking Countermeasure. CT-RSA 2012: 156-170
59		Youssef Souissi, Shivam Bhasin, Sylvain Guilley, Maxime Nassar, Jean-Luc Danger: Towards Different Flavors of Combined Side Channel Attacks. CT-RSA 2012: 245-259
58		Maxime Nassar, Youssef Souissi, Sylvain Guilley, Jean-Luc Danger: RSM: A small and fast countermeasure for AES, secure against 1st and 2nd-order zero-offset SCAs. DATE 2012: 1173-1178
57		Sylvain Guilley, Jean-Luc Danger, Robert Nguyen, Philippe Nguyen: System-Level Methods to Prevent Reverse-Engineering, Cloning, and Trojan Insertion. ICISTM 2012: 433-438
56		Houssem Maghrebi, Claude Carlet, Sylvain Guilley, Jean-Luc Danger: Optimal First-Order Masking with Linear and Non-Linear Bijections. IACR Cryptology ePrint Archive 2012: 175 (2012)
55		Houssem Maghrebi, Emmanuel Prouff, Sylvain Guilley, Jean-Luc Danger: A First-Order Leak-Free Masking Countermeasure. IACR Cryptology ePrint Archive 2012: 28 (2012)
54		Laurent Sauvage, Sylvain Guilley, Florent Flament, Jean-Luc Danger, Yves Mathieu: Blind Cartography for Side Channel Attacks: Cross-Correlation Cartography. Int. J. Reconfig. Comp. 2012: (2012)
	2011
53		Youssef Souissi, Jean-Luc Danger, Sylvain Guilley, Shivam Bhasin, Maxime Nassar: Embedded systems security: An evaluation methodology against Side Channel Attacks. DASIP 2011: 230-237
52		Olivier Meynard, Denis Réal, Florent Flament, Sylvain Guilley, Naofumi Homma, Jean-Luc Danger: Enhancement of simple electro-magnetic attacks by pre-characterization in frequency domain and demodulation techniques. DATE 2011: 1004-1009
51		Houssem Maghrebi, Sylvain Guilley, Jean-Luc Danger: Formal security evaluation of hardware Boolean masking against second-order attacks. HOST 2011: 40-46
50		Sylvain Guilley, Laurent Sauvage, Jean-Luc Danger, Nidhal Selmane, Denis Réal: Performance evaluation of protocols resilient to physical attacks. HOST 2011: 51-56
49		Maxime Nassar, Sylvain Guilley, Jean-Luc Danger: Formal Analysis of the Entropy / Security Trade-off in First-Order Masking Countermeasures against Side-Channel Attacks. INDOCRYPT 2011: 22-39
48		Maxime Nassar, Youssef Souissi, Sylvain Guilley, Jean-Luc Danger: "Rank Correction": A New Side-Channel Approach for Secret Key Recovery. InfoSecHiComNet 2011: 128-143
47		Shivam Bhasin, Sylvain Guilley, Youssef Souissi, Tarik Graba, Jean-Luc Danger: Efficient Dual-Rail Implementations in FPGA Using Block RAMs. ReConFig 2011: 261-267
46		Sylvain Guilley, Karim Khalfallah, Victor Lomné, Jean-Luc Danger: Formal Framework for the Evaluation of Waveform Resynchronization Algorithms. WISTP 2011: 100-115
45		Houssem Maghrebi, Sylvain Guilley, Jean-Luc Danger: Leakage Squeezing Countermeasure against High-Order Attacks. WISTP 2011: 208-223
44		Sumanta Chaudhuri, Sylvain Guilley, Philippe Hoogvorst, Jean-Luc Danger, Taha Beyrouthy, Alin Razafindraibe, Laurent Fesquet, Marc Renaudin: A Secure Asynchronous FPGA Architecture, Experimental Results and Some Debug Feedback CoRR abs/1103.1360: (2011)
43		Houssem Maghrebi, Sylvain Guilley, Claude Carlet, Jean-Luc Danger: Classification of High-Order Boolean Masking Schemes and Improvements of their Efficiency. IACR Cryptology ePrint Archive 2011: 520 (2011)
42		Maxime Nassar, Sylvain Guilley, Jean-Luc Danger: Formal Analysis of the Entropy / Security Trade-off in First-Order Masking Countermeasures against Side-Channel Attacks. IACR Cryptology ePrint Archive 2011: 534 (2011)
	2010
41		Shivam Bhasin, Sylvain Guilley, Laurent Sauvage, Jean-Luc Danger: Unrolling Cryptographic Circuits: A Simple Countermeasure Against Side-Channel Attacks. CT-RSA 2010: 195-207
40		Maxime Nassar, Shivam Bhasin, Jean-Luc Danger, Guillaume Duc, Sylvain Guilley: BCDL: A high speed balanced DPL for FPGA with global precharge and no early evaluation. DATE 2010: 849-854
39		Olivier Meynard, Sylvain Guilley, Jean-Luc Danger, Laurent Sauvage: Far Correlation-based EMA with a precharacterized leakage model. DATE 2010: 977-980
38		Sylvain Guilley, Laurent Sauvage, Jean-Luc Danger, Nidhal Selmane: Fault Injection Resilience. FDTC 2010: 51-65
37		Houssem Maghrebi, Sylvain Guilley, Jean-Luc Danger, Florent Flament: Entropy-based Power Attack. HOST 2010: 1-6
36		Youssef Souissi, Sylvain Guilley, Jean-Luc Danger, Sami Mekki, Guillaume Duc: Improvement of power analysis attacks using Kalman filter. ICASSP 2010: 1778-1781
35		Youssef Souissi, Maxime Nassar, Sylvain Guilley, Jean-Luc Danger, Florent Flament: First Principal Components Analysis: A New Side Channel Distinguisher. ICISC 2010: 407-419
34		Olivier Meynard, Denis Réal, Sylvain Guilley, Florent Flament, Jean-Luc Danger, Frédéric Valette: Characterization of the Electromagnetic Side Channel in Frequency Domain. Inscrypt 2010: 471-486
33		Laurent Sauvage, Sylvain Guilley, Florent Flament, Jean-Luc Danger, Yves Mathieu: Cross-Correlation Cartography. ReConFig 2010: 268-273
32		Zouha Cherif, Florent Flament, Jean-Luc Danger, Shivam Bhasin, Sylvain Guilley, Hervé Chabanne: Evaluation of White-Box and Grey-Box Noekeon Implementations in FPGA. ReConFig 2010: 310-315
31		Shivam Bhasin, Sylvain Guilley, Florent Flament, Nidhal Selmane, Jean-Luc Danger: Countering early evaluation: an approach towards robust dual-rail precharge logic. WESS 2010: 6
30		M. Abdelaziz Elaabid, Olivier Meynard, Sylvain Guilley, Jean-Luc Danger: Combined Side-Channel Attacks. WISA 2010: 175-190
29		Laurent Sauvage, Maxime Nassar, Sylvain Guilley, Florent Flament, Jean-Luc Danger, Yves Mathieu: Exploiting Dual-Output Programmable Blocks to Balance Secure Dual-Rail Logics. Int. J. Reconfig. Comp. 2010: (2010)
	2009
28		Laurent Sauvage, Sylvain Guilley, Jean-Luc Danger, Yves Mathieu, Maxime Nassar: Successful attack on an FPGA-based WDDL DES cryptoprocessor without place and route constraints. DATE 2009: 640-645
27		Nidhal Selmane, Shivam Bhasin, Sylvain Guilley, Tarik Graba, Jean-Luc Danger: WDDL is Protected against Setup Time Violation Attacks. FDTC 2009: 73-83
26		Shivam Bhasin, Jean-Luc Danger, Sylvain Guilley, Nidhal Selmane: Security Evaluation of Different AES Implementations Against Practical Setup Time Violation Attacks in FPGAs. HOST 2009: 15-21
25		Sylvain Guilley, Sumanta Chaudhuri, Laurent Sauvage, Jean-Luc Danger, Taha Beyrouthy, Laurent Fesquet: Updates on the potential of clock-less logics to strengthen cryptographic circuits against side-channel attacks. ICECS 2009: 351-354
24		Julien Bringer, Hervé Chabanne, Jean-Luc Danger: Protecting the NOEKEON Cipher against SCARE Attacks in FPGAs by Using Dynamic Implementations. ReConFig 2009: 183-188
23		Shivam Bhasin, Jean-Luc Danger, Florent Flament, Tarik Graba, Sylvain Guilley, Yves Mathieu, Maxime Nassar, Laurent Sauvage, Nidhal Selmane: Combined SCA and DFA Countermeasures Integrable in a FPGA Design Flow. ReConFig 2009: 213-218
22		Laurent Sauvage, Maxime Nassar, Sylvain Guilley, Florent Flament, Jean-Luc Danger, Yves Mathieu: DPL on Stratix II FPGA: What to Expect?. ReConFig 2009: 243-248
21		Julien Bringer, Hervé Chabanne, Jean-Luc Danger: Protecting the NOEKEON Cipher Against SCARE Attacks in FPGAs by using Dynamic Implementations. IACR Cryptology ePrint Archive 2009: 239 (2009)
20		Jean-Luc Danger, Sylvain Guilley, Philippe Hoogvorst: High speed true random number generator based on open loop structures in FPGAs. Microelectronics Journal 40(11): 1650-1656 (2009)
19		Sami Mekki, Jean-Luc Danger, Benoit Miscopein: On the Implementation of a Probabilistic Equalizer for Low-Cost Impulse Radio UWB in High Data Rate. Wireless Sensor Network 1(4): 245-256 (2009)
	2008
18		Sumanta Chaudhuri, Sylvain Guilley, Philippe Hoogvorst, Jean-Luc Danger, Taha Beyrouthy, Alin Razafindraibe, Laurent Fesquet, Marc Renaudin: Physical Design of FPGA Interconnect to Prevent Information Leakage. ARC 2008: 87-98
17		Sumanta Chaudhuri, Sylvain Guilley, Florent Flament, Philippe Hoogvorst, Jean-Luc Danger: An 8x8 run-time reconfigurable FPGA embedded in a SoC. DAC 2008: 120-125
16		Nidhal Selmane, Sylvain Guilley, Jean-Luc Danger: Practical Setup Time Violation Attacks on AES. EDCC 2008: 91-96
15		Sylvain Guilley, Laurent Sauvage, Jean-Luc Danger, Nidhal Selmane, Renaud Pacalet: Silicon-level Solutions to Counteract Passive and Active Attacks. FDTC 2008: 3-17
14		Sumanta Chaudhuri, Jean-Luc Danger, Philippe Hoogvorst, Sylvain Guilley: Efficient tiling patterns for reconfigurable gate arrays. FPGA 2008: 257
13		Sylvain Guilley, Laurent Sauvage, Jean-Luc Danger, Philippe Hoogvorst: Area optimization of cryptographic co-processors implemented in dual-rail with precharge positive logic. FPL 2008: 161-166
12		Sylvain Guilley, Sumanta Chaudhuri, Jean-Luc Danger, Laurent Sauvage, Philippe Hoogvorst, Maxime Nassar, Tarik Graba, Vinh-Nga Vong: Place-and-Route Impact on the Security of DPL Designs in FPGAs. HOST 2008: 26-32
11		Farouk Khelil, Mohamed Hamdi, Sylvain Guilley, Jean-Luc Danger, Nidhal Selmane: Fault Analysis Attack on an FPGA AES Implementation. NTMS 2008: 1-5
10		Sumanta Chaudhuri, Sylvain Guilley, Philippe Hoogvorst, Jean-Luc Danger: Efficient tiling patterns for reconfigurable gate arrays. SLIP 2008: 11-18
9		Sylvain Guilley, Laurent Sauvage, Jean-Luc Danger, Tarik Graba, Yves Mathieu: Evaluation of Power-Constant Dual-Rail Logic as a Protection of Cryptographic Applications in FPGAs. SSIRI 2008: 16-23
8		Sami Mekki, Jean-Luc Danger, Benoit Miscopein, Jean Schwoerer, Joseph Jean Boutros: Probabilistic Equalizer for Ultra-Wideband Energy Detection. VTC Spring 2008: 1108-1112
7		Philippe Hoogvorst, Sylvain Guilley, Sumanta Chaudhuri, Jean-Luc Danger, Taha Beyrouthy, Laurent Fesquet: A Reconfigurable Programmable Logic Block for a Multi-Style Asynchronous FPGA resistant to Side-Channel Attacks CoRR abs/0809.3942: (2008)
	2007
6		Sumanta Chaudhuri, Jean-Luc Danger, Sylvain Guilley: Efficient Modeling and Floorplanning of Embedded-FPGA Fabric. FPL 2007: 665-669
5		Qing Xu, M. B. C. Silva, Jean-Luc Danger, Sylvain Guilley, Patrick Bellot, Philippe Gallion, Francisco Mendieta: Towards Quantum Key Distribution System using Homodyne Detection with Differential Time-Multiplexed Reference. RIVF 2007: 158-165
4		F. Guilloud, Emmanuel Boutillon, Jacky Tousch, Jean-Luc Danger: Generic Description and Synthesis of LDPC Decoders. IEEE Transactions on Communications 55(11): 2084-2091 (2007)
	2000
3		Andrés D. García, Jean-Luc Danger, Wayne P. Burleson: Low power digital design in FPGAs (poster abstract): a study of pipeline architectures implemented in a FPGA using a low supply voltage to reduce power consumption. FPGA 2000: 220
	1999
2		L. Naviner, Jean-Luc Danger, C. Laurent: High-Performance Low-Cost Implementation of Two-Dimensional DCT Processor nn FPGA. FPGA 1999: 249
1		Andrés D. García, Wayne P. Burleson, Jean-Luc Danger: Power Modelling in Field Programmable Gate Arrays (FPGA). FPL 1999: 396-404

Coauthor Index

1	Patrick Bellot	[5]
2	Taha Beyrouthy	[7] [18] [25] [44]
3	Shivam Bhasin	[23] [26] [27] [31] [32] [40] [41] [47] [53] [59]
4	Emmanuel Boutillon	[4]
5	Joseph Jean Boutros (Joseph Boutros)	[8]
6	Julien Bringer	[21] [24]
7	Wayne P. Burleson (Wayne Burleson)	[1] [3]
8	Claude Carlet	[43] [56]
9	Hervé Chabanne	[21] [24] [32]
10	Sumanta Chaudhuri	[6] [7] [10] [12] [14] [17] [18] [25] [44]
11	Zouha Cherif	[32]
12	Guillaume Duc	[36] [40]
13	M. Abdelaziz Elaabid	[30]
14	Laurent Fesquet	[7] [18] [25] [44]
15	Florent Flament	[17] [22] [23] [29] [31] [32] [33] [34] [35] [37] [52] [54]
16	Philippe Gallion	[5]
17	Andrés D. García	[1] [3]
18	Tarik Graba	[9] [12] [23] [27] [47]
19	Sylvain Guilley	[5] [6] [7] [9] [10] [11] [12] [13] [14] [15] [16] [17] [18] [20] [22] [23] [25] [26] [27] [28] [29] [30] [31] [32] [33] [34] [35] [36] [37] [38] [39] [40] [41] [42] [43] [44] [45] [46] [47] [48] [49] [50] [51] [52] [53] [54] [55] [56] [57] [58] [59] [60] [61]
20	F. Guilloud	[4]
21	Mohamed Hamdi	[11]
22	Naofumi Homma	[52]
23	Philippe Hoogvorst	[7] [10] [12] [13] [14] [17] [18] [20] [44] [61]
24	Karim Khalfallah	[46]
25	Farouk Khelil	[11]
26	C. Laurent	[2]
27	Victor Lomné	[46]
28	Houssem Maghrebi	[37] [43] [45] [51] [55] [56] [60]
29	Yves Mathieu	[9] [22] [23] [28] [29] [33] [54]
30	Sami Mekki	[8] [19] [36]
31	Francisco Mendieta	[5]
32	Olivier Meynard	[30] [34] [39] [52]
33	Benoit Miscopein	[8] [19]
34	Cédric Murdica	[61]
35	David Naccache (Deh Cac Can)	[61]
36	Maxime Nassar	[12] [22] [23] [28] [29] [35] [40] [42] [48] [49] [53] [58] [59]
37	L. Naviner	[2]
38	Philippe Nguyen	[57]
39	Robert Nguyen	[57]
40	Renaud Pacalet	[15]
41	Emmanuel Prouff	[55] [60]
42	Alin Razafindraibe	[18] [44]
43	Denis Réal	[34] [50] [52]
44	Marc Renaudin	[18] [44]
45	Laurent Sauvage	[9] [12] [13] [15] [22] [23] [25] [28] [29] [33] [38] [39] [41] [50] [54]
46	Jean Schwoerer	[8]
47	Nidhal Selmane	[11] [15] [16] [23] [26] [27] [31] [38] [50]
48	M. B. C. Silva	[5]
49	Youssef Souissi	[35] [36] [47] [48] [53] [58] [59]
50	Jacky Tousch	[4]
51	Frédéric Valette	[34]
52	Vinh-Nga Vong	[12]
53	Qing Xu	[5]

Colors in the list of coauthors

Last update Tue May 29 20:41:18 2012 CET by the DBLP Team — Data released under the ODC-BY 1.0 license — See also our legal information page