Damian Dalton

	2011
12		Christoph Trummer, Christoph Ruggenthaler, Christoph M. Kirchsteiger, Christian Steger, Reinhold Weiß, Markus Pistauer, Damian Dalton: Searching Extended IP-XACT Components for SoC Design Based on Requirements Similarity. IEEE Systems Journal 5(1): 70-79 (2011)
	2010
11		Christoph Trummer, Christoph M. Kirchsteiger, Christian Steger, Reinhold Weiss, Markus Pistauer, Damian Dalton: Automated simulation-based verification of power requirements for Systems-on-Chips. DDECS 2010: 8-11
10		Christoph Ruggenthaler, Christoph Trummer, Christian Steger, Reinhold Weiß, Andreas Schuhai, Markus Pistauer, Damian Dalton: An IP-XACT Library extended with verification information for functionality-based component selection. Elektrotechnik und Informationstechnik 127(4): 109-113 (2010)
	2005
9		Mario Polaschegg, Christian Steger, Damian Dalton, Abhay Vadher: Parallel Simulation with a Generic Simulation Framework Featuring Loose Coupling. ICPP Workshops 2005: 251-257
8		Alexander Maili, Christian Steger, Reinhold Weiss, Rob Quigley, Damian Dalton: Reducing the Communication Bottleneck via On-Chip Cosimulation of Gate-Level HDL and C-Models on a Hardware Accelerator. ISVLSI 2005: 290-291
	2004
7		Mario Polaschegg, Christian Steger, Damian Dalton, Abhay Vadher: A Generic Simulation Framework for Multiprocessor Architectures. FDL 2004: 345-355
6		Alexander Maili, Damian Dalton, Christian Steger: A Generic Timing Mechanism for Using the APPLES Gate-Level Simulator in a Mixed-Level Simulation Environment. PATMOS 2004: 799-808
	2003
5		Damian Dalton, Vivian Bessler, Jeffrey Griffiths, Andrew McCarthy, Abhay Vadher, Rory O'Kane, Rob Quigley, Declan O'Connor: APPLES: A Full Gate-Timing FPGA-Based Hardware Simulator. FPL 2003: 1162-1165
	1999
4		Damian Dalton: Avoiding Conventional Overheads in Parallel Logic Simulation: A New Architecture. HiPC 1999: 364-370
3		Damian Dalton: Analysis of an Associative Array Parallel Logic Simulator. ICPP Workshops 1999: 308-312
2		Damian Dalton: A New Timing Mechanism Architecture for Discrete Logic Event Simulation. PDPTA 1999: 1236-1242
1		Damian Dalton: The Speedup Performance of an Associative Memory Based Logic Simulator. PaCT 1999: 207-216

Coauthor Index

1	Vivian Bessler	[5]
2	Jeffrey Griffiths	[5]
3	Christoph M. Kirchsteiger	[11] [12]
4	Alexander Maili	[6] [8]
5	Andrew McCarthy	[5]
6	Declan O'Connor	[5]
7	Rory O'Kane	[5]
8	Markus Pistauer	[10] [11] [12]
9	Mario Polaschegg	[7] [9]
10	Rob Quigley	[5] [8]
11	Christoph Ruggenthaler	[10] [12]
12	Andreas Schuhai	[10]
13	Christian Steger	[6] [7] [8] [9] [10] [11] [12]
14	Christoph Trummer	[10] [11] [12]
15	Abhay Vadher	[5] [7] [9]
16	Reinhold Weiss (Reinhold Weiß)	[8] [10] [11] [12]

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