Zefu Dai

	2012
5		Zefu Dai, Jianwen Zhu: Saturating the transceiver bandwidth: switch fabric design on FPGAs. FPGA 2012: 67-76
	2011
4		Zefu Dai, Jianwen Zhu: A bursty multi-port memory controller with quality-of-service guarantees. CODES+ISSS 2011: 21-28
	2010
3		Zefu Dai, Nick Ni, Jianwen Zhu: A 1 cycle-per-byte XML parsing accelerator. FPGA 2010: 199-208
2		Zefu Dai, Mark Jarvin, Jianwen Zhu: Credit Borrow and Repay: Sharing DRAM with minimum latency and bandwidth guarantees. ICCAD 2010: 197-204
	2009
1		Rangyu Deng, Weixia Xu, Qiang Dou, Hongwei Zhou, Zefu Dai, Haiyan Chen: An efficient stream memory architecture for heterogeneous multicore processor. ISCC 2009: 287-290

Coauthor Index

1	Haiyan Chen	[1]
2	Rangyu Deng	[1]
3	Qiang Dou	[1]
4	Mark Jarvin	[2]
5	Nick Ni	[3]
6	Weixia Xu	[1]
7	Hongwei Zhou	[1]
8	Jianwen Zhu	[2] [3] [4] [5]

Colors in the list of coauthors

Last update Tue May 29 01:28:40 2012 CET by the DBLP Team — Data released under the ODC-BY 1.0 license — See also our legal information page