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| 2006 | ||
|---|---|---|
| 60 | Fangyi Luo, Yongbo Jia, Wayne Wei-Ming Dai: Yield-preferred via insertion based on novel geotopological technology. ASP-DAC 2006: 730-735 | |
| 2005 | ||
| 59 | Anru Wang, Wayne Wei-Ming Dai: Area-IO DRAM/logic integration with system-in-a-package (SiP). ASP-DAC 2005: 893-896 | |
| 58 | Anru Wang, Wayne Wei-Ming Dai: Design and Analysis of Area-IO DRAM/Logic Integration with System-in-a-Package(SiP). ISQED 2005: 562-566 | |
| 2004 | ||
| 57 | Hao Ji, Qingjian Yu, Wayne Wei-Ming Dai: SPICE compatible circuit models for partial reluctance K. ASP-DAC 2004: 786-791 | |
| 56 | Beibei Ren, Anru Wang, Joyopriya Bakshi, Kai Liu, Wei Li, Wayne Wei-Ming Dai: A Domain-Specific Cell Based ASIC Design Methodology for Digital Signal Processing Applications. DATE 2004: 280-285 | |
| 55 | Xiaohai Wu, Xianlong Hong, Yici Cai, Zuying Luo, Chung-Kuan Cheng, Jun Gu, Wayne Wei-Ming Dai: Area minimization of power distribution network using efficient nonlinear programming techniques. IEEE Trans. on CAD of Integrated Circuits and Systems 23(7): 1086-1094 (2004) | |
| 2003 | ||
| 54 | Michael X. Wang, Katsuharu Suzuki, Wayne Wei-Ming Dai: Electrical and Thermal Analysis for System-in-a-Package (SiP) Implementation Platform. ISQED 2003: 229-234 | |
| 53 | Shuo Zhang, Wayne Wei-Ming Dai: TEG: a new post-layout optimization method. IEEE Trans. on CAD of Integrated Circuits and Systems 22(4): 446-456 (2003) | |
| 2002 | ||
| 52 | Paul B. Morton, Wayne Wei-Ming Dai: Crosstalk noise estimation for noise management. DAC 2002: 659-664 | |
| 51 | Shuo Zhang, Wayne Wei-Ming Dai: TEG: a new post-layout optimization method. ISPD 2002: 62-67 | |
| 2001 | ||
| 50 | Hidetoshi Onodera, Andrew B. Kahng, Wayne Wei-Ming Dai, Sani R. Nassif, Juho Kim, Akira Tanabe, Toshihiro Hattori: Beyond the red brick wall (panel): challenges and solutions in 50nm physical design. ASP-DAC 2001: 267-268 | |
| 49 | Hao Ji, Anirudh Devgan, Wayne Wei-Ming Dai: KSim: a stable and efficient RKC simulator for capturing on-chip inductance effect. ASP-DAC 2001: 379-384 | |
| 48 | Xiaohai Wu, Xianlong Hong, Yici Cai, Chung-Kuan Cheng, Jun Gu, Wayne Wei-Ming Dai: Area Minimization of Power Distribution Network Using Efficient Nonlinear Programming Techniques. ICCAD 2001: 153-157 | |
| 47 | Minqing Liu, Tiejun Yu, Wayne Wei-Ming Dai: Fast 3-D Inductance Extraction in Lossy Multi-Layer Substrate. ICCAD 2001: 424-429 | |
| 2000 | ||
| 46 | Michael X. Wang, Katsuharu Suzuki, Wayne Wei-Ming Dai, Yee L. Low, Kevin J. O'Conner, King L. Tai: Integration of large-scale FPGA and DRAM in a package using chip-on-chip technology. ASP-DAC 2000: 205-210 | |
| 45 | Minqing Liu, Wayne Wei-Ming Dai: Modeling and analysis of integrated spiral inductors for RF system-in-package. ASP-DAC 2000: 211-216 | |
| 44 | Katsuharu Suzuki, Michael X. Wang, Zhao Fang, Wayne Wei-Ming Dai: Design of C++ Class Library and Bit-Serial Compiler for Variable-Precision Datapath Synthesis on Adaptive Computing Systems. FCCM 2000: 339-340 | |
| 43 | Anirudh Devgan, Hao Ji, Wayne Wei-Ming Dai: How to Efficiently Capture On-Chip Inductance Effects: Introducing a New Circuit Element K. ICCAD 2000: 150-155 | |
| 1999 | ||
| 42 | Paul B. Morton, Wayne Wei-Ming Dai: An efficient sequential quadratic programming formulation of optimal wire spacing for cross-talk noise avoidance routing. ISPD 1999: 22-28 | |
| 1998 | ||
| 41 | Jinsong Zhao, Wayne Wei-Ming Dai, Sharad Kapur, David E. Long: Efficient Three-Dimensional Extraction Based on Static and Full-Wave Layered Green's Functions. DAC 1998: 224-229 | |
| 40 | Maggie Zhiwei Kang, Wayne Wei-Ming Dai: Arbitrary rectilinear block packing based on sequence pair. ICCAD 1998: 259-266 | |
| 39 | Maggie Zhiwei Kang, Wayne Wei-Ming Dai: Topology constrained rectilinear block packing for layout reuse. ISPD 1998: 179-186 | |
| 1997 | ||
| 38 | Wayne Wei-Ming Dai: Chip Parasitic Extraction and Signal Integrity Verification (Extended Abstract). DAC 1997: 717-719 | |
| 37 | Wayne Wei-Ming Dai, Howard L. Kalter, Rob Roy, Wayne Wolf: Critical technologies and methodologies for systems-on-chips (tutorial). ICCAD 1997 | |
| 36 | Jeffrey Z. Su, Wayne Wei-Ming Dai: Post-route optimization for improved yield using a rubber-band wiring model. ICCAD 1997: 700-706 | |
| 35 | Maggie Zhiwei Kang, Wayne Wei-Ming Dai, Tom Dillinger, David P. LaPotin: Delay bounded buffered tree construction for timing driven floorplanning. ICCAD 1997: 707-712 | |
| 34 | Joe G. Xi, Wayne Wei-Ming Dai: Useful-Skew Clock Routing with Gate Sizing for Low Power Design. VLSI Signal Processing 16(2-3): 163-179 (1997) | |
| 1996 | ||
| 33 | Weikai Sun, Wayne Wei-Ming Dai, Wei Hong II: Fast Parameters Extraction of General Three-Dimension Interconnects Using Geometry Independent Measured Equation of Invariance. DAC 1996: 371-376 | |
| 32 | Joe G. Xi, Wayne Wei-Ming Dai: Useful-Skew Clock Routing With Gate Sizing for Low Power Design. DAC 1996: 383-388 | |
| 31 | Joel Darnauer, Wayne Wei-Ming Dai: A Method for Generating Random Circuits and Its Application to Routability Measurement. FPGA 1996: 66-72 | |
| 30 | Joe G. Xi, Wayne Wei-Ming Dai: Jitter-tolerant clock routing in two-phase synchronous systems. ICCAD 1996: 316-320 | |
| 29 | Wei Hong II, Weikai Sun, Zhenhai Zhu, Hao Ji, Ben Song, Wayne Wei-Ming Dai: A novel dimension reduction technique for the capacitance extraction of 3D VLSI interconnects. ICCAD 1996: 381-386 | |
| 28 | Man-Fai Yu, Joel Darnauer, Wayne Wei-Ming Dai: Interchangeable pin routing with application to package layout. ICCAD 1996: 668-673 | |
| 27 | Qing Zhu, Wayne Wei-Ming Dai: Planar clock routing for high performance chip and package co-design. IEEE Trans. VLSI Syst. 4(2): 210-226 (1996) | |
| 26 | Qing Zhu, Wayne Wei-Ming Dai: High-speed clock network sizing optimization based on distributed RC and lossy RLC interconnect models. IEEE Trans. on CAD of Integrated Circuits and Systems 15(9): 1106-1118 (1996) | |
| 1995 | ||
| 25 | Man-Fai Yu, Wayne Wei-Ming Dai: Pin assignment and routing on a single-layer Pin Grid Array. ASP-DAC 1995 | |
| 24 | Joe G. Xi, Wayne Wei-Ming Dai: Buffer Insertion and Sizing Under Process Variations for Low Power Clock Distribution. DAC 1995: 491-496 | |
| 23 | Tsuyoshi Isshiki, Wayne Wei-Ming Dai: High-Level Bit-Serial Datapath Synthesis for Multi-FPGA Systems. FPGA 1995: 167-173 | |
| 22 | Vijayshri Maheshwari, Joel Darnauer, John Ramirez, Wayne Wei-Ming Dai: Design of FPGAs with Area I/O for Field Programmable MCM. FPGA 1995: 17-23 | |
| 21 | Man-Fai Yu, Wayne Wei-Ming Dai: Single-layer fanout routing and routability analysis for Ball Grid Arrays. ICCAD 1995: 581-586 | |
| 20 | Haifang Liao, Wayne Wei-Ming Dai: Partitioning and reduction of RC interconnect networks based on scattering parameter macromodels. ICCAD 1995: 704-709 | |
| 19 | Jimmy Shinn-Hwa Wang, Wayne Wei-Ming Dai: Transient analysis of coupled transmission lines characterized with the frequency-dependent losses using scattering-parameter based macromodel. ICCD 1995: 18-24 | |
| 18 | Jimmy Shinn-Hwa Wang, Wayne Wei-Ming Dai: Transformation of min-max optimization to least-square estimation and application to interconnect design optimization. ICCD 1995: 664-670 | |
| 1994 | ||
| 17 | Tsuyoshi Isshiki, Wayne Wei-Ming Dai: Hight-Performance Datapath Implementation on Field-Programmable Multi-Chip Module (FPMCM). FPL 1994: 373-384 | |
| 16 | Haifang Liao, Wayne Wei-Ming Dai: Capturing time-of-flight delay for transient analysis based on scattering parameter macromodel. ICCAD 1994: 412-417 | |
| 15 | Jimmy Shinn-Hwa Wang, Wayne Wei-Ming Dai: Optimal Design of Self-Damped Lossy Transmission Lines for Multichip Modules. ICCD 1994: 594-598 | |
| 1993 | ||
| 14 | Haifang Liao, Wayne Wei-Ming Dai, Rui Wang, Fung-Yuel Chang: S-Parameter Based Macro Model of Distributed-Lumped Networks Using Exponentially Decayed Polynomial Function. DAC 1993: 726-731 | |
| 13 | Qing Zhu, Wayne Wei-Ming Dai, Joe G. Xi: Optimal sizing of high-speed clock networks based on distributed RC and lossy transmission line models. ICCAD 1993: 628-633 | |
| 12 | Haifang Liao, Rui Wang, Rajit Chandra, Wayne Wei-Ming Dai: S-parameter based macro model of distributed-lumped networks using Pade approximation. ISCAS 1993: 2319-2322 | |
| 11 | Wayne Wei-Ming Dai, Yoji Kajitani, Yorihiko Hirata: Optimal single hop multiple bus networks. ISCAS 1993: 2541-2544 | |
| 10 | David Staepelaere, Jeffrey Jue, Tal Dayan, Wayne Wei-Ming Dai: SURF: Rubber-Band Routing System for Multichip Modules. IEEE Design & Test of Computers 10(4): 18-26 (1993) | |
| 9 | Wayne Wei-Ming Dai, Kwang-Ting (Tim) Cheng: Guest Editor's Introduction. IEEE Design & Test of Computers 10(4): 7- (1993) | |
| 1992 | ||
| 8 | Qing Zhu, Wayne Wei-Ming Dai: Perfect-balance planar clock routing with minimal path-length. ICCAD 1992: 473-476 | |
| 1991 | ||
| 7 | Wayne Wei-Ming Dai, Tal Dayan, David Staepelaere: Topological Routing in SURF: Generating a Rubber-Band sketch. DAC 1991: 39-44 | |
| 6 | Wayne Wei-Ming Dai, Raymond Kong, Masao Sato: Routability of a Rubber-Band Sketch. DAC 1991: 45-48 | |
| 1990 | ||
| 5 | Wayne Wei-Ming Dai, Raymond Kong, Jeffrey Jue: Rubber Band Routing and Dynamic Data Representation. ICCAD 1990: 52-55 | |
| 1989 | ||
| 4 | Wayne Wei-Ming Dai: Hierarchical placement and floorplanning in BEAR. IEEE Trans. on CAD of Integrated Circuits and Systems 8(12): 1335-1349 (1989) | |
| 1987 | ||
| 3 | Wayne Wei-Ming Dai, Masao Sato, Ernest S. Kuh: A Dynamic and Efficient Representation of Building-Block Layout. DAC 1987: 376-384 | |
| 2 | Wayne Wei-Ming Dai, Ernest S. Kuh: Simultaneous Floor Planning and Global Routing for Hierarchical Building-Block Layout. IEEE Trans. on CAD of Integrated Circuits and Systems 6(5): 828-837 (1987) | |
| 1985 | ||
| 1 | Wayne Wei-Ming Dai, Tetsuo Asano, Ernest S. Kuh: Routing Region Definition and Ordering Scheme for Building-Block Layout. IEEE Trans. on CAD of Integrated Circuits and Systems 4(3): 189-197 (1985) | |
Colors in the list of coauthors
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