Peter Dahlgren

	2011
17		Liang-Chi Chen, Peter Dahlgren, Paul Dickinson, Scott Davidson: Transition test bring-up and diagnosis on UltraSPARCTM processors. ITC 2011: 1-10
	2009
16		Liang-Chi Chen, Paul Dickinson, Peter Dahlgren, Scott Davidson, Olivier Caty, Kevin Wu: Using transition test to understand timing behavior of logic circuits on UltraSPARCTM T2 family. ITC 2009: 1-10
	2008
15		Liang-Chi Chen, Paul Dickinson, Prasad Mantri, Murali M. R. Gala, Peter Dahlgren, Subhra Bhattacharya, Olivier Caty, Kevin Woodling, Thomas A. Ziaja, David Curwen, Wendy Yee, Ellen Su, Guixiang Gu, Tim Nguyen: Transition Test on UltraSPARC- T2 Microprocessor. ITC 2008: 1-10
	2005
14		Olivier Caty, Peter Dahlgren, Ismet Bayraktaroglu: Microprocessor silicon debug based on failure propagation tracing. ITC 2005: 10
	2003
13		Peter Dahlgren, Paul Dickinson, Ishwar Parulkar: Latch Divergency In Microprocessor Failure Analysis. ITC 2003: 755-763
	1998
12		Peter Dahlgren: Switch-level bridging fault simulation in the presence of feedbacks. ITC 1998: 363-371
	1997
11		Peter Dahlgren: Switch-level modeling of feedback faults using global oscillation control. VTS 1997: 117-122
	1996
10		Peter Dahlgren: Oscillation Control in Logic Simulation using Dynamic Dominance Grahps. DAC 1996: 155-160
9		Peter Dahlgren, Peter Lidén: A fault model for switch-level simulation of gate-to-drain shorts. VTS 1996: 414-421
	1995
8		Peter Dahlgren, Peter Lidén: A Switch-level Algorithm for Simulation of Transients in Combinational Logic. FTCS 1995: 207-216
7		Peter Dahlgren: A multiple-dominance switch-level model for simulation of short faults. ICCAD 1995: 674-680
6		Peter Lidén, Peter Dahlgren: Coverage of Transistor-Level and Gate-Level Stuck-at Faults in CMOS Checkers. ISCAS 1995: 2124-2127
5		Peter Lidén, Peter Dahlgren: Switch-level modeling of transistor-level stuck-at faults. VTS 1995: 208-215
	1994
4		Peter Dahlgren, Peter Lidén: Modeling of Intermediate Node States in switch-Level Networks. DAC 1994: 722-727
3		Peter Lidén, Peter Dahlgren, Rolf Johansson, Johan Karlsson: On Latching Probability of Particle Induced Transients in Combinational Networks. FTCS 1994: 340-349
	1993
2		Peter Dahlgren, Peter Lidén: Efficient modeling of switch-level networks containing undetermined logic node states. ICCAD 1993: 746-752
	1992
1		Peter Lidén, Peter Dahlgren, Jan Torin: Transistor Fault Coverage for Self-Testing CMOS Checkers. ITC 1992: 476-485

Coauthor Index

1	Ismet Bayraktaroglu	[14]
2	Subhra Bhattacharya	[15]
3	Olivier Caty	[14] [15] [16]
4	Liang-Chi Chen	[15] [16] [17]
5	David Curwen	[15]
6	Scott Davidson	[16] [17]
7	Paul Dickinson	[13] [15] [16] [17]
8	Murali M. R. Gala	[15]
9	Guixiang Gu	[15]
10	Rolf Johansson	[3]
11	Johan Karlsson	[3]
12	Peter Lidén	[1] [2] [3] [4] [5] [6] [8] [9]
13	Prasad Mantri	[15]
14	Tim Nguyen	[15]
15	Ishwar Parulkar	[13]
16	Ellen Su	[15]
17	Jan Torin	[1]
18	Kevin Woodling	[15]
19	Kevin Wu	[16]
20	Wendy Yee	[15]
21	Thomas A. Ziaja	[15]

Colors in the list of coauthors

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