Wilfried Daehn

	1998
17		Werner van Almsick, Thorsten Drabe, Wilfried Daehn, Christian Müller-Schloer: A Central Control Engine for an Open and Hybrid Simulation Environment. DIS-RT 1998: 15-22
16		Werner van Almsick, Thorsten Drabe, Wilfried Daehn, Christian Müller-Schloer: An Open Simulation and Modeling Environment for Embedded Real-Time Systems. International Workshop on Rapid System Prototyping 1998: 95-100
	1995
15		Udo Jorczyk, Wilfried Daehn, Oliver Neumann: Fault modeling of differential ECL. EURO-DAC 1995: 190-195
	1994
14		David B. Bernstein, Werner van Almsick, Wilfried Daehn: Distributed simulation for structural VHDL netlists. EURO-DAC 1994: 598-603
13		Wilfried Daehn: Electrosmog and Electromagnetic CAD (Invited Paper). HPCN 1994: 94-98
	1991
12		Wilfried Daehn: Load Balancing in a Hybrid ATPG Environment. IEEE Trans. Computers 40(7): 878-882 (1991)
11		André Ivanov, Corot W. Starke, Vinod K. Agarwal, Wilfried Daehn, Matthias Gruetzner, Tom W. Williams: Iterative algorithms for computing aliasing probabilities. IEEE Trans. on CAD of Integrated Circuits and Systems 10(2): 260-265 (1991)
10		Wilfried Daehn: Fault simulation using small fault samples. J. Electronic Testing 2(2): 191-203 (1991)
	1990
9		Torsten Grüning, Udo Mahlstedt, Wilfried Daehn, Cengiz Özcan: Accelerated test pattern generation by cone-oriented circuit partitioning. EURO-DAC 1990: 418-421
8		Udo Mahlstedt, Torsten Grüning, Cengiz Özcan, Wilfried Daehn: Contest: A Fast ATPG Tool for Very Large Combinatorial Circuits. ICCAD 1990: 222-225
	1988
7		Tom W. Williams, Wilfried Daehn, Matthias Gruetzner, Corot W. Starke: Bounds and analysis of aliasing errors in linear feedback shift registers. IEEE Trans. on CAD of Integrated Circuits and Systems 7(1): 75-83 (1988)
	1986
6		Wilfried Daehn: A unified treatment of PLA faults by Boolean differences. DAC 1986: 334-338
5		Wilfried Daehn, Josef Gross: A Test Generator IC for Testing Large CMOS-RAMs. ITC 1986: 18-24
4		Tom W. Williams, Wilfried Daehn, Matthias Gruetzner, Corot W. Starke: Comparison of Aliasing Errors for Primitive and Non-Primitive Polynomials. ITC 1986: 282-289
	1982
3		G. Grassl, Wilfried Daehn, U. Ludemann, U. Theus: Ein 32-Bit-Rechenwerk mit eingebautem Hardware-Selbsttest. Fehlertolerierende Rechensysteme 1982: 45-58
	1981
2		Wilfried Daehn, Joachim Mucha: Hardware Test Pattern Generation for Built-In Testing. ITC 1981: 110-120
1		Wilfried Daehn, Joachim Mucha: A Hardware Approach to Self-Testing of Large Programmable Logic Arrays. IEEE Trans. Computers 30(11): 829-833 (1981)

Coauthor Index

1	Vinod K. Agarwal	[11]
2	Werner van Almsick	[14] [16] [17]
3	David B. Bernstein	[14]
4	Thorsten Drabe	[16] [17]
5	G. Grassl	[3]
6	Josef Gross	[5]
7	Matthias Gruetzner	[4] [7] [11]
8	Torsten Grüning	[8] [9]
9	André Ivanov	[11]
10	Udo Jorczyk	[15]
11	U. Ludemann	[3]
12	Udo Mahlstedt	[8] [9]
13	Joachim Mucha	[1] [2]
14	Christian Müller-Schloer	[16] [17]
15	Oliver Neumann	[15]
16	Cengiz Özcan	[8] [9]
17	Corot W. Starke	[4] [7] [11]
18	U. Theus	[3]
19	Tom W. Williams	[4] [7] [11]

Colors in the list of coauthors

Last update Tue May 29 01:28:40 2012 CET by the DBLP Team — Data released under the ODC-BY 1.0 license — See also our legal information page