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| 2007 | ||
|---|---|---|
| 1 | S. Dabas, Ning Dong, Jaijeet S. Roychowdhury: Automated Extraction of Accurate Delay/Timing Macromodels of Digital Gates and Latches using Trajectory Piecewise Methods. ASP-DAC 2007: 361-366 | |
| 1 | Ning Dong | [1] |
| 2 | Jaijeet S. Roychowdhury | [1] |
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