 | 2012 |
| 45 |  | Rainer Dömer,
Weiwei Chen,
Xu Han:
Parallel discrete event simulation of Transaction Level Models.
ASP-DAC 2012: 227-231 |
| 44 |  | Weiwei Chen,
Rainer Dömer:
An optimizing compiler for out-of-order parallel ESL simulation exploiting instance isolation.
ASP-DAC 2012: 461-466 |
| 43 |  | Weiwei Chen,
Xu Han,
Rainer Dömer:
Out-of-order parallel simulation for ESL design.
DATE 2012: 141-146 |
| 2011 |
| 42 |  | Rainer Dömer,
Weiwei Chen,
Xu Han,
Andreas Gerstlauer:
Multi-core parallel simulation of System-level Description Languages.
ASP-DAC 2011: 311-316 |
| 41 |  | Weiwei Chen,
Xu Han,
Rainer Dömer:
Multicore Simulation of Transaction-Level Models Using the SoC Environment.
IEEE Design & Test of Computers 28(3): 20-31 (2011) |
| 2010 |
| 40 |  | Weiwei Chen,
Rainer Dömer:
A fast heuristic scheduling algorithm for periodic ConcurrenC models.
ASP-DAC 2010: 161-166 |
| 39 |  | Rainer Dömer:
Computer-aided recoding for multi-core systems.
ASP-DAC 2010: 713-716 |
| 38 |  | Gunar Schirner,
Andreas Gerstlauer,
Rainer Dömer:
System-level development of embedded software.
ASP-DAC 2010: 903-909 |
| 37 |  | Wolfgang Ecker,
Pierre Bricaud,
Rainer Dömer,
Yossi Veller,
Stefan Heinen,
Jurgen Mossinger,
Andreas von Schwerin:
Panel Session - Who Is Closing the embedded software design gap?
DATE 2010: 932 |
| 36 |  | Weiwei Chen,
Xu Han,
Rainer Dömer:
ESL design and multi-core validation using the System-on-Chip Environment.
HLDVT 2010: 142-147 |
| 35 |  | Gunar Schirner,
Andreas Gerstlauer,
Rainer Dömer:
Fast and accurate processor models for efficient MPSoC design.
ACM Trans. Design Autom. Electr. Syst. 15(2): (2010) |
| 2009 |
| 34 |  | Rainer Dömer,
Andreas Gerstlauer,
Wolfgang Müller:
Introduction to hardware-dependent software design hardware-dependent software for multi- and many-core embedded systems.
ASP-DAC 2009: 290-292 |
| 33 |  | Rainer Leupers,
Andras Vajda,
Marco Bekooij,
Soonhoi Ha,
Rainer Dömer,
Achim Nohl:
Programming MPSoC platforms: Road works ahead!
DATE 2009: 1584-1589 |
| 32 |  | Rainer Dömer:
Efficient Modeling of Embedded Systems Using Computer-Aided Recoding.
IESS 2009: 310-311 |
| 31 |  | Ines Viskic,
Rainer Dömer:
A Configurable TLM of Wireless Sensor Networks for Fast Exploration of System Communication Performance.
IESS 2009: 44-56 |
| 30 |  | Weiwei Chen,
Rainer Dömer:
ConcurrenC: A New Approach towards Effective Abstraction of C-Based SLDLs.
IESS 2009: 57-65 |
| 2008 |
| 29 |  | Gunar Schirner,
Andreas Gerstlauer,
Rainer Dömer:
Automatic generation of hardware dependent software for MPSoCs from abstract system specifications.
ASP-DAC 2008: 271-276 |
| 28 |  | Pramod Chandraiah,
Rainer Dömer:
Automatic re-coding of reference code into structured and analyzable SoC models.
ASP-DAC 2008: 440-445 |
| 27 |  | Gunar Schirner,
Rainer Dömer:
Introducing Preemptive Scheduling in Abstract RTOS Models using Result Oriented Modeling.
DATE 2008: 122-127 |
| 26 |  | Gunar Schirner,
Rainer Dömer:
Quantitative analysis of the speed/accuracy trade-off in transaction level modeling.
ACM Trans. Embedded Comput. Syst. 8(1): (2008) |
| 25 |  | Rainer Dömer,
Andreas Gerstlauer,
Junyu Peng,
Dongwan Shin,
Lukai Cai,
Haobo Yu,
Samar Abdi,
Daniel D. Gajski:
System-on-Chip Environment: A SpecC-Based Framework for Heterogeneous MPSoC Design.
EURASIP J. Emb. Sys. 2008: (2008) |
| 24 |  | Dongwan Shin,
Andreas Gerstlauer,
Rainer Dömer,
Daniel Gajski:
An Interactive Design Environment for C-Based High-Level Synthesis of RTL Processors.
IEEE Trans. VLSI Syst. 16(4): 466-475 (2008) |
| 23 |  | Pramod Chandraiah,
Rainer Dömer:
Code and Data Structure Partitioning for Parallel and Flexible MPSoC Specification Using Designer-Controlled Recoding.
IEEE Trans. on CAD of Integrated Circuits and Systems 27(6): 1078-1090 (2008) |
| 2007 |
| 22 |  | Achim Rettberg,
Mauro Cesar Zanella,
Rainer Dömer,
Andreas Gerstlauer,
Franz-Josef Rammig:
Embedded System Design: Topics, Techniques and Trends, IFIP TC10 Working Conference: International Embedded Systems Symposium (IESS), May 30 - June 1, 2007, Irvine, CA, USA
Springer 2007 |
| 21 |  | Gunar Schirner,
Andreas Gerstlauer,
Rainer Dömer:
Abstract, Multifaceted Modeling of Embedded Processors for System Level Design.
ASP-DAC 2007: 384-389 |
| 20 |  | Pramod Chandraiah,
Junyu Peng,
Rainer Dömer:
Creating Explicit Communication in SoC Models Using Interactive Re-Coding.
ASP-DAC 2007: 50-55 |
| 19 |  | Pramod Chandraiah,
Rainer Dömer:
Pointer re-coding for creating definitive MPSoC models.
CODES+ISSS 2007: 33-38 |
| 18 |  | Pramod Chandraiah,
Rainer Dömer:
Designer-Controlled Generation of Parallel and Flexible Heterogeneous MPSoC Specification.
DAC 2007: 787-790 |
| 17 |  | Dongwan Shin,
Andreas Gerstlauer,
Rainer Dömer,
Daniel D. Gajski:
An Interactive Design Environment for C-based High-Level Synthesis.
IESS 2007: 135-144 |
| 16 |  | Pramod Chandraiah,
Rainer Dömer:
An Interactive Model Re-Coder for Efficient SoC Specification.
IESS 2007: 193-206 |
| 15 |  | Gunar Schirner,
Gautam Sachdeva,
Andreas Gerstlauer,
Rainer Dömer:
Embedded Software Development in a System-Level Design Flow.
IESS 2007: 289-298 |
| 14 |  | Andreas Gerstlauer,
Dongwan Shin,
Junyu Peng,
Rainer Dömer,
Daniel Gajski:
Automatic Layer-Based Generation of System-On-Chip Bus Communication Models.
IEEE Trans. on CAD of Integrated Circuits and Systems 26(9): 1676-1687 (2007) |
| 13 |  | Gunar Schirner,
Rainer Dömer:
Result-Oriented Modeling - A Novel Technique for Fast and Accurate TLM.
IEEE Trans. on CAD of Integrated Circuits and Systems 26(9): 1688-1699 (2007) |
| 2006 |
| 12 |  | Dongwan Shin,
Andreas Gerstlauer,
Junyu Peng,
Rainer Dömer,
Daniel D. Gajski:
Automatic generation of transaction level models for rapid design space exploration.
CODES+ISSS 2006: 64-69 |
| 11 |  | Gunar Schirner,
Rainer Dömer:
Accurate yet fast modeling of real-time communication.
CODES+ISSS 2006: 70-75 |
| 10 |  | Gunar Schirner,
Rainer Dömer:
Quantitative analysis of transaction level models for the AMBA bus.
DATE 2006: 230-235 |
| 9 |  | Ines Viskic,
Rainer Dömer:
A Flexible, Syntax Independent Representation (SIR) for System Level Design Models.
DSD 2006: 288-294 |
| 8 |  | Gunar Schirner,
Rainer Dömer:
Fast and accurate transaction level models using result oriented modeling.
ICCAD 2006: 363-368 |
| 2005 |
| 7 |  | Andreas Gerstlauer,
Dongwan Shin,
Rainer Dömer,
Daniel D. Gajski:
System-level communication modeling for network-on-chip synthesis.
ASP-DAC 2005: 45-48 |
| 6 |  | Dongwan Shin,
Andreas Gerstlauer,
Rainer Dömer,
Daniel D. Gajski:
Automatic network generation for system-on-chip communication design.
CODES+ISSS 2005: 255-260 |
| 2004 |
| 5 |  | Haobo Yu,
Rainer Dömer,
Daniel Gajski:
Embedded software generation from system level design languages.
ASP-DAC 2004: 463-468 |
| 2002 |
| 4 |  | Rainer Dömer,
Andreas Gerstlauer,
Wolfgang Müller:
The Formal Execution Semantics of SpecC.
ISSS 2002: 150-155 |
| 2000 |
| 3 |  | Rainer Dömer,
Daniel Gajski:
Reuse and protection of intellectual property in the SpecC system.
ASP-DAC 2000: 49-54 |
| 1998 |
| 2 |  | Daniel Gajski,
Rainer Dömer,
Jianwen Zhu:
IP-Centric Methodology and Specification Language.
DIPES 1998: 3-22 |
| 1994 |
| 1 |  | Birger Landwehr,
Peter Marwedel,
Rainer Dömer:
OSCAR: optimum simultaneous scheduling, allocation and resource binding based on integer programming.
EURO-DAC 1994: 90-95 |