Dariusz Czysz

	2011
11		Dariusz Czysz, Grzegorz Mrugalski, Nilanjan Mukherjee, Janusz Rajski, Jerzy Tyszer: Reduced ATE Interface for High Test Data Compression. European Test Symposium 2011: 99-104
10		Dariusz Czysz, Grzegorz Mrugalski, Nilanjan Mukherjee, Janusz Rajski, P. Szczerbicki, Jerzy Tyszer: Deterministic Clustering of Incompatible Test Cubes for Higher Power-Aware EDT Compression. IEEE Trans. on CAD of Integrated Circuits and Systems 30(8): 1225-1238 (2011)
	2010
9		Dariusz Czysz, Grzegorz Mrugalski, Nilanjan Mukherjee, Janusz Rajski, P. Szczerbicki, Jerzy Tyszer: Low power compression of incompatible test cubes. ITC 2010: 704-713
8		Dariusz Czysz, Grzegorz Mrugalski, Nilanjan Mukherjee, Janusz Rajski, Jerzy Tyszer: On Compaction Utilizing Inter and Intra-Correlation of Unknown States. IEEE Trans. on CAD of Integrated Circuits and Systems 29(1): 117-126 (2010)
	2009
7		Grzegorz Mrugalski, Nilanjan Mukherjee, Janusz Rajski, Dariusz Czysz, Jerzy Tyszer: Compression based on deterministic vector clustering of incompatible test cubes. ITC 2009: 1-10
6		Grzegorz Mrugalski, Nilanjan Mukherjee, Janusz Rajski, Dariusz Czysz, Jerzy Tyszer: Highly X-Tolerant Selective Compaction of Test Responses. VTS 2009: 245-250
5		Dariusz Czysz, Mark Kassab, Xijiang Lin, Grzegorz Mrugalski, Janusz Rajski, Jerzy Tyszer: Low-Power Scan Operation in Test Compression Environment. IEEE Trans. on CAD of Integrated Circuits and Systems 28(11): 1742-1755 (2009)
	2008
4		Dariusz Czysz, Mark Kassab, Xijiang Lin, Grzegorz Mrugalski, Janusz Rajski, Jerzy Tyszer: Low Power Scan Shift and Capture in the EDT Environment. ITC 2008: 1-10
3		Dariusz Czysz, Grzegorz Mrugalski, Janusz Rajski, Jerzy Tyszer: Low-Power Test Data Application in EDT Environment Through Decompressor Freeze. IEEE Trans. on CAD of Integrated Circuits and Systems 27(7): 1278-1290 (2008)
	2007
2		Grzegorz Mrugalski, Janusz Rajski, Dariusz Czysz, Jerzy Tyszer: New Test Data Decompressor for Low Power Applications. DAC 2007: 539-544
1		Dariusz Czysz, Grzegorz Mrugalski, Janusz Rajski, Jerzy Tyszer: Low Power Embedded Deterministic Test. VTS 2007: 75-83

Coauthor Index

1	Mark Kassab	[4] [5]
2	Xijiang Lin	[4] [5]
3	Grzegorz Mrugalski	[1] [2] [3] [4] [5] [6] [7] [8] [9] [10] [11]
4	Nilanjan Mukherjee	[6] [7] [8] [9] [10] [11]
5	Janusz Rajski	[1] [2] [3] [4] [5] [6] [7] [8] [9] [10] [11]
6	P. Szczerbicki	[9] [10]
7	Jerzy Tyszer	[1] [2] [3] [4] [5] [6] [7] [8] [9] [10] [11]

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