Robert Czerwinski

	2012
4		Robert Czerwinski, Dariusz Kania: Area and speed oriented synthesis of FSMs for PAL-based CPLDs. Microprocessors and Microsystems - Embedded Hardware Design 36(1): 45-61 (2012)
	2009
3		Robert Czerwinski, Dariusz Kania: CPLD-oriented Synthesis of Finite State Machines. DSD 2009: 521-528
2		Robert Czerwinski, Dariusz Kania: Synthesis of finite state machines for CPLDs. Applied Mathematics and Computer Science 19(4): 647-659 (2009)
	2005
1		Robert Czerwinski, Dariusz Kania: State Assignment for PAL-based CPLDs. DSD 2005: 127-134

Coauthor Index

1

Dariusz Kania

[1] [2] [3] [4]

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