 | 2012 |
|---|
| 8 |       | Stefan Hadjis,
Andrew Canis,
Jason Helge Anderson,
Jongsok Choi,
Kevin Nam,
Stephen Dean Brown,
Tomasz S. Czajkowski:
Impact of FPGA architecture on resource sharing in high-level synthesis.
FPGA 2012: 111-114 |
| 2011 |
|---|
| 7 | | Andrew Canis,
Jongsok Choi,
Mark Aldham,
Victor Zhang,
Ahmed Kammoona,
Jason Helge Anderson,
Stephen Dean Brown,
Tomasz S. Czajkowski:
LegUp: high-level synthesis for FPGA-based processor/accelerator systems.
FPGA 2011: 33-36 |
| 2010 |
|---|
| 6 | | Tomasz S. Czajkowski,
Stephen Dean Brown:
Decomposition-Based Vectorless Toggle Rate Computation for FPGA Circuits.
IEEE Trans. on CAD of Integrated Circuits and Systems 29(11): 1723-1735 (2010) |
| 2008 |
|---|
| 5 | | Tomasz S. Czajkowski,
Stephen Dean Brown:
Functionally linear decomposition and synthesis of logic circuits for FPGAs.
DAC 2008: 18-23 |
| 4 | | Tomasz S. Czajkowski,
Stephen Dean Brown:
Fast toggle rate computation for FPGA circuits.
FPL 2008: 65-70 |
| 3 | | Tomasz S. Czajkowski,
Stephen Dean Brown:
Functionally Linear Decomposition and Synthesis of Logic Circuits for FPGAs.
IEEE Trans. on CAD of Integrated Circuits and Systems 27(12): 2236-2249 (2008) |
| 2007 |
|---|
| 2 | | Tomasz S. Czajkowski,
Stephen Dean Brown:
Using Negative Edge Triggered FFs to Reduce Glitching Power in FPGA Circuits.
DAC 2007: 324-329 |
| 2004 |
|---|
| 1 | | Tomasz S. Czajkowski,
Jonathan Rose:
A synthesis oriented omniscient manual editor.
FPGA 2004: 89-98 |
Data released under the ODC-BY 1.0 license — See also our legal information page