René Cumplido

René Cumplido-Parra

	2012
35		Pedro Aaron Hernandez-Avalos, Claudia Feregrino Uribe, René Cumplido: Watermarking using similarities based on fractal codification. Digital Signal Processing 22(2): 324-336 (2012)
34		Alejandro Rojas, René Cumplido, Jesús Ariel Carrasco-Ochoa, Claudia Feregrino, José Francisco Martínez Trinidad: Hardware-software platform for computing irreducible testors. Expert Syst. Appl. 39(2): 2203-2210 (2012)
	2011
33		Peter M. Athanas, Jürgen Becker, René Cumplido: 2011 International Conference on Reconfigurable Computing and FPGAs, ReConFig 2011, Cancun, Mexico, November 30 - December 2, 2011 IEEE Computer Society 2011
32		Ignacio Algredo-Badillo, Claudia Feregrino Uribe, René Cumplido, Miguel Morales-Sandoval: Novel Hardware Architecture for Implementing the Inner Loop of the SHA-2 Algorithms. DSD 2011: 543-549
31		Jürgen Becker, Pascal Benoit, René Cumplido: RAW Introduction. IPDPS Workshops 2011: 125-127
30		Roberto Perez-Andrade, Cesar Torres-Huitzil, René Cumplido, Juan M. Campos: On a Hybrid and General Control Scheme for Algorithms Represented as a Polytope. IPDPS Workshops 2011: 330-333
29		René Cumplido, Claudia Feregrino Uribe, Jose Juan Garcia-Hernandez: Invited paper: Implementing digital data hiding algorithms in reconfigurable hardware - Experiences on teaching and research. ReCoSoC 2011: 1-6
28		Jose Juan Garcia-Hernandez, Claudia Feregrino Uribe, René Cumplido, Carolina Reta: On the Implementation of a Hardware Architecture for an Audio Data Hiding System. Signal Processing Systems 64(3): 457-468 (2011)
	2010
27		Viktor K. Prasanna, Jürgen Becker, René Cumplido: ReConFig'10: 2010 International Conference on Reconfigurable Computing and FPGAs, Cancun, Quintana Roo, Mexico, 13-15 December 2010, Proceedings IEEE Computer Society 2010
26		Tomás Balderas-Contreras, Gustavo Rodríguez Gómez, René Cumplido: A UML 2.0 Profile to Model Block Cipher Algorithms. ECMFA 2010: 20-31
25		Lázaro Bustio-Martínez, René Cumplido, José Hernández Palancar, Claudia Feregrino Uribe: On the Design of a Hardware-Software Architecture for Acceleration of SVM's Training Phase. MCPR 2010: 281-290
24		Alejandro Mesa, Claudia Feregrino Uribe, René Cumplido, José Hernández Palancar: A Highly Parallel Algorithm for Frequent Itemset Mining. MCPR 2010: 291-300
23		Ignacio Algredo-Badillo, Claudia Feregrino Uribe, René Cumplido, Miguel Morales-Sandoval: Efficient hardware architecture for the AES-CCM protocol of the IEEE 802.11i standard. Computers & Electrical Engineering 36(3): 565-577 (2010)
22		Roberto Perez-Andrade, René Cumplido, Claudia Feregrino Uribe, Fernando Martin del Campo: A versatile hardware architecture for a constant false alarm rate processor based on a linear insertion sorter. Digital Signal Processing 20(6): 1733-1747 (2010)
21		Miguel Morales-Sandoval, Claudia Feregrino Uribe, René Cumplido, Ignacio Algredo-Badillo: A Single Formula and its Implementation in FPGA for Elliptic Curve Point Addition Using Affine Representation. Journal of Circuits, Systems, and Computers 19(2): 425-433 (2010)
	2009
20		Viktor K. Prasanna, Lionel Torres, René Cumplido: ReConFig'09: 2009 International Conference on Reconfigurable Computing and FPGAs, Cancun, Quintana Roo, Mexico, 9-11 December 2009, Proceedings IEEE Computer Society 2009
19		Santos Lépez-Estrada, René Cumplido: FPGA-architecture for Knowledge-Based Target Detection in Radar Signal Processing. ERSA 2009: 287-290
18		Miguel Morales-Sandoval, Claudia Feregrino Uribe, René Cumplido, Ignacio Algredo-Badillo: An area/performance trade-off analysis of a GF(2m) multiplier architecture for elliptic curve cryptography. Computers & Electrical Engineering 35(1): 54-58 (2009)
17		Fernando Martin del Campo, René Cumplido, Roberto Perez-Andrade, Aldo G. Orozco-Lugo: A System on a Programmable Chip Architecture for Data-Dependent Superimposed Training Channel Estimation. Int. J. Reconfig. Comp. 2009: (2009)
16		Roberto Perez-Andrade, René Cumplido, Claudia Feregrino Uribe, Fernando Martin del Campo: A versatile linear insertion sorter based on an FIFO scheme. Microelectronics Journal 40(12): 1705-1713 (2009)
	2008
15		Roberto Perez-Andrade, René Cumplido, Claudia Feregrino Uribe, Fernando Martin del Campo: A versatile hardware architecture for a CFAR detector based on a linear insertion sorter. FPL 2008: 467-470
14		Roberto Perez-Andrade, René Cumplido, Fernando Martin del Campo, Claudia Feregrino Uribe: A Versatile Linear Insertion Sorter Based on a FIFO Scheme. ISVLSI 2008: 357-362
13		Fernando Martin del Campo, René Cumplido, Roberto Perez-Andrade, Aldo G. Orozco-Lugo: Hybrid Architecture for Data-Dependent Superimposed Training in Digital Receivers. ReConFig 2008: 355-360
12		Jose Juan Garcia-Hernandez, Claudia Feregrino Uribe, René Cumplido: FPGA Implementation of a Modulated Complex Lapped Transform for Watermarking Systems. ReConFig 2008: 367-372
11		Ignacio Algredo-Badillo, Claudia Feregrino Uribe, René Cumplido, Miguel Morales-Sandoval: FPGA Implementation and Performance Evaluation of AES-CCM Cores for Wireless Networks. ReConFig 2008: 421-426
10		Z. Jezabel Guzman Zavaleta, Claudia Feregrino Uribe, René Cumplido: A Reversible Data Hiding Algorithm for Radiological Medical Images and Its Hardware Implementation. ReConFig 2008: 444-449
9		Tomás Balderas-Contreras, René Cumplido, Claudia Feregrino Uribe: On the design and implementation of a RISC processor extension for the KASUMI encryption algorithm. Computers & Electrical Engineering 34(6): 531-546 (2008)
8		Ignacio Algredo-Badillo, Claudia Feregrino Uribe, René Cumplido, Miguel Morales-Sandoval: Design and Implementation of a Non-pipelined MD5 Hardware Architecture Using a New Functional Description. IEICE Transactions 91-D(10): 2519-2523 (2008)
	2007
7		Alejandro Rojas, René Cumplido, Jesús Ariel Carrasco-Ochoa, Claudia Feregrino Uribe, José Francisco Martínez Trinidad: FPGA-Based Architecture for Computing Testors. IDEAL 2007: 188-197
	2006
6		René Cumplido, Jesús Ariel Carrasco-Ochoa, Claudia Feregrino: On the Design and Implementation of a High Performance Configurable Architecture for Testor Identification. CIARP 2006: 665-673
5		Ignacio Algredo-Badillo, Claudia Feregrino Uribe, René Cumplido: Design and Implementation of an FPGA-Based 1.452-Gbps Non-pipelined AES Architecture. ICCSA (3) 2006: 456-465
	2005
4		Tomás Balderas-Contreras, René Cumplido: High performance encryption cores for 3G networks. DAC 2005: 240-243
3		Santos López-Estrada, René Cumplido-Parra: Fusion center with neural network for target detection in background clutter. ENC 2005: 189-197
	2004
2		Santos López-Estrada, René Cumplido-Parra, Cesar Torres-Huitzil: A Hybrid Approach for Target Detection Using CFAR Algorithm and Image Processing. ENC 2004: 108-115
1		Cesar Torres-Huitzil, René Cumplido-Parra, Santos López-Estrada: Design and Implementation of a CFAR Processor for Target Detection. FPL 2004: 943-947

Coauthor Index

1	Ignacio Algredo-Badillo	[5] [8] [11] [18] [21] [23] [32]
2	Peter M. Athanas (Peter Athanas)	[33]
3	Tomás Balderas-Contreras	[4] [9] [26]
4	Jürgen Becker	[27] [31] [33]
5	Pascal Benoit	[31]
6	Lázaro Bustio-Martínez	[25]
7	Fernando Martin del Campo	[13] [14] [15] [16] [17] [22]
8	Juan M. Campos	[30]
9	Jesús Ariel Carrasco-Ochoa	[6] [7] [34]
10	Jose Juan Garcia-Hernandez	[12] [28] [29]
11	Gustavo Rodríguez Gómez	[26]
12	Pedro Aaron Hernandez-Avalos	[35]
13	Santos Lépez-Estrada	[19]
14	Santos López-Estrada	[1] [2] [3]
15	Alejandro Mesa	[24]
16	Miguel Morales-Sandoval	[8] [11] [18] [21] [23] [32]
17	Aldo G. Orozco-Lugo	[13] [17]
18	José Hernández Palancar	[24] [25]
19	Roberto Perez-Andrade	[13] [14] [15] [16] [17] [22] [30]
20	Viktor K. Prasanna (V. K. Prasanna Kumar)	[20] [27]
21	Carolina Reta	[28]
22	Alejandro Rojas	[7] [34]
23	Lionel Torres	[20]
24	Cesar Torres-Huitzil	[1] [2] [30]
25	José Francisco Martínez Trinidad	[7] [34]
26	Claudia Feregrino Uribe (Claudia Feregrino)	[5] [6] [7] [8] [9] [10] [11] [12] [14] [15] [16] [18] [21] [22] [23] [24] [25] [28] [29] [32] [34] [35]
27	Z. Jezabel Guzman Zavaleta	[10]

Colors in the list of coauthors

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