 | 2012 |
| 56 |  | Srdjan Stipic,
Sasa Tomic,
Ferad Zyulkyarov,
Adrián Cristal,
Osman S. Ünsal,
Mateo Valero:
TagTM - accelerating STMs with hardware tags for fast meta-data access.
DATE 2012: 39-44 |
| 55 |  | Azam Seyedi,
Adrià Armejach,
Adrián Cristal,
Osman S. Unsal,
Ibrahim Hur,
Mateo Valero:
Circuit design of a dual-versioning L1 data cache.
Integration 45(3): 237-245 (2012) |
| 54 |  | Ferad Zyulkyarov,
Srdjan Stipic,
Tim Harris,
Osman S. Unsal,
Adrián Cristal,
Ibrahim Hur,
Mateo Valero:
Profiling and Optimizing Transactional Memory Applications.
International Journal of Parallel Programming 40(1): 25-56 (2012) |
| 53 |  | J. Rubén Titos Gil,
Manuel E. Acacio,
José M. García,
Tim Harris,
Adrián Cristal,
Osman S. Unsal,
Ibrahim Hur,
Mateo Valero:
Hardware transactional memory with software-defined conflicts.
TACO 8(4): 31 (2012) |
| 2011 |
| 52 |  | Azam Seyedi,
Adrià Armejach,
Adrián Cristal,
Osman S. Unsal,
Ibrahim Hur,
Mateo Valero:
Circuit design of a dual-versioning L1 data cache for optimistic concurrency.
ACM Great Lakes Symposium on VLSI 2011: 325-330 |
| 51 |  | Nehir Sönmez,
Oriol Arcas,
Gokhan Sayilar,
Osman S. Unsal,
Adrián Cristal,
Ibrahim Hur,
Satnam Singh,
Mateo Valero:
From Plasma to BeeFarm: Design Experience of an FPGA-Based Multicore Prototype.
ARC 2011: 350-362 |
| 50 |  | Nehir Sönmez,
Oriol Arcas,
Otto Pflucker,
Osman S. Unsal,
Adrián Cristal,
Ibrahim Hur,
Satnam Singh,
Mateo Valero:
TMbox: A Flexible and Reconfigurable 16-Core Hybrid Transactional Memory System.
FCCM 2011: 146-153 |
| 49 |  | Gulay Yalcin,
Osman S. Unsal,
Adrián Cristal,
Mateo Valero:
FIMSIM: A fault injection infrastructure for microarchitectural simulators.
ICCD 2011: 431-432 |
| 48 |  | Gokcen Kestor,
Vasileios Karakostas,
Osman S. Unsal,
Adrián Cristal,
Ibrahim Hur,
Mateo Valero:
RMS-TM: a comprehensive benchmark suite for transactional memory systems.
ICPE 2011: 335-346 |
| 47 |  | Gulay Yalcin,
Osman S. Unsal,
Adrián Cristal,
Ibrahim Hur,
Mateo Valero:
SymptomTM: Symptom-Based Error Detection and Recovery Using Hardware Transactional Memory.
PACT 2011: 199-200 |
| 46 |  | Gokcen Kestor,
Roberto Gioiosa,
Tim Harris,
Osman S. Unsal,
Adrián Cristal,
Ibrahim Hur,
Mateo Valero:
STM2: A Parallel STM for High Performance Simultaneous Multithreading Systems.
PACT 2011: 221-231 |
| 45 |  | Carlos Villavieja,
Vasileios Karakostas,
Lluís Vilanova,
Yoav Etsion,
Alex Ramírez,
Avi Mendelson,
Nacho Navarro,
Adrián Cristal,
Osman S. Unsal:
DiDi: Mitigating the Performance Impact of TLB Shootdowns Using a Shared TLB Directory.
PACT 2011: 340-349 |
| 44 |  | Adrià Armejach,
Azam Seyedi,
J. Rubén Titos Gil,
Ibrahim Hur,
Adrián Cristal,
Osman S. Unsal,
Mateo Valero:
Using a Reconfigurable L1 Data Cache for Efficient Version Management in Hardware Transactional Memory.
PACT 2011: 361-371 |
| 43 |  | Enrique Vallejo,
Sutirtha Sanyal,
Tim Harris,
Fernando Vallejo,
Ramón Beivide,
Osman S. Unsal,
Adrián Cristal,
Mateo Valero:
Hybrid Transactional Memory with Pessimistic Concurrency Control.
International Journal of Parallel Programming 39(3): 375-396 (2011) |
| 42 |  | Gokcen Kestor,
Vasileios Karakostas,
Osman S. Unsal,
Adrián Cristal,
Ibrahim Hur,
Mateo Valero:
RMS-TM: a comprehensive benchmark suite for transactional memory systems (abstracts only).
SIGMETRICS Performance Evaluation Review 39(3): 19 (2011) |
| 2010 |
| 41 |  | Tim Harris,
Sasa Tomic,
Adrián Cristal,
Osman S. Unsal:
Dynamic filtering: multi-purpose architecture support for language runtime systems.
ASPLOS 2010: 39-52 |
| 40 |  | Enrique Vallejo,
Ramón Beivide,
Adrián Cristal,
Tim Harris,
Fernando Vallejo,
Osman S. Unsal,
Mateo Valero:
Architectural Support for Fair Reader-Writer Locking.
MICRO 2010: 275-286 |
| 39 |  | Ferad Zyulkyarov,
Srdjan Stipic,
Tim Harris,
Osman S. Unsal,
Adrián Cristal,
Ibrahim Hur,
Mateo Valero:
Discovering and understanding performance bottlenecks in transactional applications.
PACT 2010: 285-294 |
| 38 |  | Ferad Zyulkyarov,
Tim Harris,
Osman S. Unsal,
Adrián Cristal,
Mateo Valero:
Debugging programs that use atomic blocks and transactional memory.
PPOPP 2010: 57-66 |
| 37 |  | Yehuda Afek,
Ulrich Drepper,
Pascal Felber,
Christof Fetzer,
Vincent Gramoli,
Michael Hohmuth,
Etienne Riviere,
Per Stenström,
Osman S. Unsal,
Walther Maldonado,
Derin Harmanci,
Patrick Marlier,
Stephan Diestelhorst,
Martin Pohlack,
Adrián Cristal,
Ibrahim Hur,
Aleksandar Dragojevic,
Rachid Guerraoui,
Michal Kapalka,
Sasa Tomic,
Guy Korland,
Nir Shavit,
Martin Nowack,
Torvald Riegel:
The Velox Transactional Memory Stack.
IEEE Micro 30(5): 76-87 (2010) |
| 2009 |
| 36 |  | Sutirtha Sanyal,
Sourav Roy,
Adrián Cristal,
Osman S. Unsal,
Mateo Valero:
Dynamically Filtering Thread-Local Variables in Lazy-Lazy Hardware Transactional Memory.
HPCC 2009: 171-179 |
| 35 |  | Vladimir Gajinov,
Ferad Zyulkyarov,
Osman S. Unsal,
Adrián Cristal,
Eduard Ayguadé,
Tim Harris,
Mateo Valero:
QuakeTM: parallelizing a complex sequential application using transactional memory.
ICS 2009: 126-135 |
| 34 |  | Nehir Sönmez,
Tim Harris,
Adrián Cristal,
Osman S. Unsal,
Mateo Valero:
Taking the heat off transactions: Dynamic selection of pessimistic concurrency control.
IPDPS 2009: 1-10 |
| 33 |  | Sutirtha Sanyal,
Sourav Roy,
Adrián Cristal,
Osman S. Unsal,
Mateo Valero:
Clock gate on abort: Towards energy-efficient hardware Transactional Memory.
IPDPS 2009: 1-8 |
| 32 |  | Sasa Tomic,
Cristian Perfumo,
Chinmay Eishan Kulkarni,
Adrià Armejach,
Adrián Cristal,
Osman S. Unsal,
Tim Harris,
Mateo Valero:
EazyHTM: eager-lazy hardware transactional memory.
MICRO 2009: 145-155 |
| 31 |  | Ferad Zyulkyarov,
Vladimir Gajinov,
Osman S. Unsal,
Adrián Cristal,
Eduard Ayguadé,
Tim Harris,
Mateo Valero:
Atomic quake: using transactional memory in an interactive multiplayer game server.
PPOPP 2009: 25-34 |
| 30 |  | Chinmay Eishan Kulkarni,
Osman S. Unsal,
Adrián Cristal,
Eduard Ayguadé,
Mateo Valero:
Turbocharging boosted transactions or: how i learnt to stop worrying and love longer transactions.
PPOPP 2009: 307-308 |
| 2008 |
| 29 |  | Cristian Perfumo,
Nehir Sönmez,
Srdjan Stipic,
Osman S. Unsal,
Adrián Cristal,
Tim Harris,
Mateo Valero:
The limits of software transactional memory (STM): dissecting Haskell STM applications on a many-core environment.
Conf. Computing Frontiers 2008: 67-78 |
| 28 |  | Miquel Pericàs,
Adrián Cristal,
Francisco J. Cazorla,
Rubén González,
Alexander V. Veidenbaum,
Daniel A. Jiménez,
Mateo Valero:
A Two-Level Load/Store Queue Based on Execution Locality.
ISCA 2008: 25-36 |
| 27 |  | Isidro Gonzalez,
Marco Galluzzi,
Alexander V. Veidenbaum,
Marco A. Ramírez,
Adrián Cristal,
Mateo Valero:
A distributed processor state management architecture for large-window processors.
MICRO 2008: 11-22 |
| 26 |  | Milos Milovanovic,
Roger Ferrer,
Vladimir Gajinov,
Osman S. Unsal,
Adrián Cristal,
Eduard Ayguadé,
Mateo Valero:
Nebelung: Execution Environment for Transactional OpenMP.
International Journal of Parallel Programming 36(3): 326-346 (2008) |
| 2007 |
| 25 |  | Marco Galluzzi,
Enrique Vallejo,
Adrián Cristal,
Fernando Vallejo,
Ramón Beivide,
Per Stenström,
James E. Smith,
Mateo Valero:
Implicit Transactional Memory in Kilo-Instruction Multiprocessors.
Asia-Pacific Computer Systems Architecture Conference 2007: 339-353 |
| 24 |  | Sasa Tomic,
Adrián Cristal,
Osman S. Unsal,
Mateo Valero:
Hardware Transactional Memory with Operating System Support, HTMOS.
Euro-Par Workshops 2007: 8-17 |
| 23 |  | Milos Milovanovic,
Roger Ferrer,
Osman S. Unsal,
Adrián Cristal,
Xavier Martorell,
Eduard Ayguadé,
Jesús Labarta,
Mateo Valero:
Transactional Memory and OpenMP.
IWOMP 2007: 37-53 |
| 22 |  | Miquel Pericàs,
Adrián Cristal,
Francisco J. Cazorla,
Ruben Gonzalez,
Daniel A. Jiménez,
Mateo Valero:
A Flexible Heterogeneous Multi-Core Architecture.
PACT 2007: 13-24 |
| 21 |  | Tim Harris,
Adrián Cristal,
Osman S. Unsal,
Eduard Ayguadé,
Fabrizio Gagliardi,
Burton Smith,
Mateo Valero:
Transactional Memory: An Overview.
IEEE Micro 27(3): 8-29 (2007) |
| 2006 |
| 20 |  | Miquel Pericàs,
Adrián Cristal,
Ruben Gonzalez,
Daniel A. Jiménez,
Mateo Valero:
A decoupled KILO-instruction processor.
HPCA 2006: 53-64 |
| 2005 |
| 19 |  | Marco A. Ramírez,
Adrián Cristal,
Mateo Valero,
Alexander V. Veidenbaum,
Luis Villa:
A New Pointer-based Instruction Queue Design and Its Power-Performance Evaluation.
ICCD 2005: 647-653 |
| 18 |  | Rubén González,
Adrián Cristal,
Miquel Pericàs,
Mateo Valero,
Alexander V. Veidenbaum:
An asymmetric clustered processor based on value content.
ICS 2005: 61-70 |
| 17 |  | Miquel Pericàs,
Adrián Cristal,
Rubén González,
Daniel A. Jiménez,
Mateo Valero:
Exploiting Execution Locality with a Decoupled Kilo-Instruction Processor.
ISHPC 2005: 56-67 |
| 16 |  | Miquel Pericàs,
Adrián Cristal,
Rubén González,
Alexander V. Veidenbaum,
Mateo Valero:
Decoupled State-Execute Architecture.
ISHPC 2005: 68-78 |
| 15 |  | Miquel Pericàs,
Adrián Cristal,
Ruben Gonzalez,
Daniel A. Jiménez:
Chained In-Order/Out-of-Order DoubleCore Architecture.
SBAC-PAD 2005: 209-217 |
| 14 |  | Adrián Cristal,
Oliverio J. Santana,
Francisco J. Cazorla,
Marco Galluzzi,
Tanausú Ramírez,
Miquel Pericàs,
Mateo Valero:
Kilo-Instruction Processors: Overcoming the Memory Wall.
IEEE Micro 25(3): 48-57 (2005) |
| 2004 |
| 13 |  | Marco Galluzzi,
Valentin Puente,
Adrián Cristal,
Ramón Beivide,
José-Ángel Gregorio,
Mateo Valero:
A first glance at Kilo-instruction based multiprocessors.
Conf. Computing Frontiers 2004: 212-221 |
| 12 |  | Adrián Cristal,
Oliverio J. Santana,
Mateo Valero:
Maintaining Thousands of In-flight Instructions.
Euro-Par 2004: 9-20 |
| 11 |  | Adrián Cristal,
Daniel Ortega,
Josep Llosa,
Mateo Valero:
Out-of-Order Commit Processors.
HPCA 2004: 48-59 |
| 10 |  | Rubén González,
Adrián Cristal,
Daniel Ortega,
Alexander V. Veidenbaum,
Mateo Valero:
A Content Aware Integer Register File Organization.
ISCA 2004: 314-324 |
| 9 |  | Miquel Pericàs,
Rubén González,
Adrián Cristal,
Alexander V. Veidenbaum,
Mateo Valero:
An Optimized Front-End Physical Register File with Banking and Writeback Filtering.
PACS 2004: 1-14 |
| 8 |  | Marco Galluzzi,
Ramón Beivide,
Valentin Puente,
José-Ángel Gregorio,
Adrián Cristal,
Mateo Valero:
Evaluating kilo-instruction multiprocessors.
WMPI 2004: 72-79 |
| 7 |  | Marco A. Ramírez,
Adrián Cristal,
Mateo Valero,
Alexander V. Veidenbaum,
Luis Villa:
A partitioned instruction queue to reduce instruction wakeup energy.
IJHPCN 1(4): 153-161 (2004) |
| 6 |  | Adrián Cristal,
Josep Llosa,
Mateo Valero,
Daniel Ortega:
Future ILP processors.
IJHPCN 2(1): 1-10 (2004) |
| 5 |  | Adrián Cristal,
José F. Martínez,
Josep Llosa,
Mateo Valero:
A case for resource-conscious out-of-order processors: towards kilo-instruction in-flight processors.
SIGARCH Computer Architecture News 32(3): 3-10 (2004) |
| 4 |  | Adrián Cristal,
Oliverio J. Santana,
Mateo Valero,
José F. Martínez:
Toward kilo-instruction processors.
TACO 1(4): 389-417 (2004) |
| 2003 |
| 3 |  | Adrián Cristal,
Daniel Ortega,
Josep Llosa,
Mateo Valero:
Kilo-instruction Processors.
ISHPC 2003: 10-25 |
| 2 |  | Marco A. Ramírez,
Adrián Cristal,
Alexander V. Veidenbaum,
Luis Villa,
Mateo Valero:
A Simple Low-Energy Instruction Wakeup Mechanism.
ISHPC 2003: 99-112 |
| 1 |  | Adrián Cristal,
José F. Martínez,
Josep Llosa,
Mateo Valero:
A Case for Resource-conscious Out-of-order Processors.
Computer Architecture Letters 2: (2003) |