 | 2012 |
| 33 |  | Aroua Briki,
Cyrille Chavet,
Philippe Coussy,
Eric Martin:
A design approach dedicated to network-based and conflict-free parallel interleavers.
ACM Great Lakes Symposium on VLSI 2012: 153-158 |
| 2011 |
| 32 |  | Awais Sani,
Philippe Coussy,
Cyrille Chavet,
Eric Martin:
A methodology based on Transportation problem modeling for designing parallel interleaver architectures.
ICASSP 2011: 1613-1616 |
| 31 |  | Awais Sani,
Philippe Coussy,
Cyrille Chavet,
Eric Martin:
An approach based on edge coloring of tripartite graph for designing parallel LDPC interleaver architecture.
ISCAS 2011: 1720-1723 |
| 2010 |
| 30 |  | Philippe Coussy,
Andrés Takach,
Michael McNamara,
Mike Meredith:
An introduction to the SystemC synthesis subset standard.
CODES+ISSS 2010: 183-184 |
| 29 |  | Ghizlane Lhairech-Lebreton,
Philippe Coussy,
Eric Martin:
Hierarchical and Multiple-Clock Domain High-Level Synthesis for Low-Power Design on FPGA.
FPL 2010: 464-468 |
| 28 |  | Cyrille Chavet,
Philippe Coussy,
Pascal Urard,
Eric Martin:
Static Address Generation Easing: a design methodology for parallel interleaver architectures.
ICASSP 2010: 1594-1597 |
| 27 |  | Awais Sani,
Philippe Coussy,
Cyrille Chavet,
Eric Martin:
Design of parallel LDPC interleaver architecture: A bipartite edge coloring approach.
ICECS 2010: 466-469 |
| 26 |  | Ghizlane Lhairech-Lebreton,
Philippe Coussy,
Dominique Heller,
Eric Martin:
Bitwidth-aware high-level synthesis for designing low-power DSP applications.
ICECS 2010: 531-534 |
| 25 |  | Cyrille Chavet,
Philippe Coussy:
A memory mapping approach for parallel interleaver design with multiples read and write accesses.
ISCAS 2010: 3168-3171 |
| 24 |  | Vincent Lefftz,
Jean Bertrand,
Hugues Cassé,
Christophe Clienti,
Philippe Coussy,
Laurent Maillet-Contoz,
Philippe Mercier,
Pierre Moreau,
Laurence Pierre,
Emmanuel Vaumorin:
A Design Flow for Critical Embedded Systems.
SIES 2010: 229-233 |
| 23 |  | Cyrille Chavet,
Philippe Coussy,
Eric Martin,
Pascal Urard:
Static Address Generation Easing: a Design Methodology for Parallel Interleaver Architectures
CoRR abs/1002.3990: (2010) |
| 22 |  | Caaliph Andriamisaina,
Philippe Coussy,
Emmanuel Casseau,
Cyrille Chavet:
High-Level Synthesis for Designing Multimode Architectures.
IEEE Trans. on CAD of Integrated Circuits and Systems 29(11): 1736-1749 (2010) |
| 2009 |
| 21 |  | Philippe Coussy,
Andrés Takach:
Guest Editors' Introduction: Raising the Abstraction Level of Hardware Design.
IEEE Design & Test of Computers 26(4): 4-6 (2009) |
| 20 |  | Philippe Coussy,
Daniel D. Gajski,
Michael Meredith,
Andrés Takach:
An Introduction to High-Level Synthesis.
IEEE Design & Test of Computers 26(4): 8-17 (2009) |
| 19 |  | Farhat Thabet,
Philippe Coussy,
Dominique Heller,
Eric Martin:
Exploration and Rapid Prototyping of DSP Applications using SystemC Behavioral Simulation and High-level Synthesis.
Signal Processing Systems 56(2-3): 167-186 (2009) |
| 2008 |
| 18 |  | Philippe Coussy,
Ghizlane Lhairech-Lebreton,
Dominique Heller:
Multiple Word-Length High-Level Synthesis.
EURASIP J. Emb. Sys. 2008: (2008) |
| 2007 |
| 17 |  | Cyrille Chavet,
Philippe Coussy,
Pascal Urard,
Eric Martin:
A design methodology for space-time adapter.
ACM Great Lakes Symposium on VLSI 2007: 347-352 |
| 16 |  | Caaliph Andriamisaina,
Emmanuel Casseau,
Philippe Coussy:
Synthesis of Multimode digital signal processing systems.
AHS 2007: 318-325 |
| 15 |  | Cyrille Chavet,
Caaliph Andriamisaina,
Philippe Coussy,
Emmanuel Casseau,
Emmanuel Juin,
Pascal Urard,
Eric Martin:
A design flow dedicated to multi-mode architectures for DSP applications.
ICCAD 2007: 604-611 |
| 14 |  | Cyrille Chavet,
Philippe Coussy,
Pascal Urard,
Eric Martin:
A Methodology for Efficient Space-Time Adapter Design Space Exploration: A Case Study of an Ultra Wide Band Interleaver.
ISCAS 2007: 2946-2949 |
| 13 |  | Cyrille Chavet,
Philippe Coussy,
Pascal Urard,
Eric Martin:
A Methodology for Efficient Space-Time Adapter Design Space Exploration: A Case Study of an Ultra Wide Band Interleaver
CoRR abs/0706.1692: (2007) |
| 12 |  | Cyrille Chavet,
Philippe Coussy,
Pascal Urard,
Eric Martin:
A Design Methodology for Space-Time Adapter
CoRR abs/0706.2732: (2007) |
| 11 |  | Cyrille Chavet,
Philippe Coussy,
Pascal Urard,
Eric Martin:
Méthodologie de modélisation et d'implémentation d'adaptateurs spatio-temporels
CoRR abs/0706.2824: (2007) |
| 10 |  | Cyrille Chavet,
Philippe Coussy,
Pascal Urard,
Eric Martin:
Application of a design space exploration tool to enhance interleaver generation
CoRR abs/0706.3009: (2007) |
| 9 |  | Philippe Coussy,
Emmanuel Casseau,
Pierre Bomel,
Adel Baganne,
Eric Martin:
Constrained algorithmic IP design for system-on-chip.
Integration 40(2): 94-105 (2007) |
| 2006 |
| 8 |  | Farhat Thabet,
Philippe Coussy,
Dominique Heller,
Eric Martin:
Design Space Exploration of DSP Applications Based on Behavioral Description Models.
SiPS 2006: 244-249 |
| 7 |  | Philippe Coussy,
Emmanuel Casseau,
Pierre Bomel,
Adel Baganne,
Eric Martin:
A formal method for hardware IP design and integration under I/O and timing constraints.
ACM Trans. Embedded Comput. Syst. 5(1): 29-53 (2006) |
| 6 |  | Philippe Coussy,
Gwenolé Corre,
Pierre Bomel,
Eric Senn,
Eric Martin:
High-level synthesis under I/O Timing and Memory constraints
CoRR abs/cs/0605143: (2006) |
| 5 |  | Gwenolé Corre,
Philippe Coussy,
Pierre Bomel,
Eric Senn,
Eric Martin:
Synthèse Comportementale Sous Contraintes de Communication et de Placement Mémoire pour les composants du TDSI
CoRR abs/cs/0605146: (2006) |
| 2005 |
| 4 |  | L. Kriaa,
S. Adriano,
Emmanuel Vaumorin,
R. Nouacer,
F. Blanc,
S. Pajaniardja,
Philippe Coussy,
Eric Martin,
Dominique Heller,
Farhat Thabet,
Anne-Marie Fouilliart:
SystemCmantic: A high level Modelling and Co-Design Framework.
FDL 2005: 341-353 |
| 3 |  | Philippe Coussy,
Gwenolé Corre,
Eric Senn,
Pierre Bomel,
Eric Martin:
High-level synthesis under I/O timing and memory constraints.
ISCAS (1) 2005: 680-683 |
| 2003 |
| 2 |  | Philippe Coussy,
Adel Baganne,
Eric Martin:
Communication and Timing Constraints Analysis for IP Design and Integration.
VLSI-SOC 2003: 38-43 |
| 2002 |
| 1 |  | Philippe Coussy,
Adel Baganne,
Eric Martin:
A design methodology for IP integration.
ISCAS (4) 2002: 711-714 |