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| 2008 | ||
|---|---|---|
| 3 | Benoit Nadeau-Dostie, Kiyoshi Takeshita, Jean-Francois Cote: Power-Aware At-Speed Scan Test Methodology for Circuits with Synchronous Clocks. ITC 2008: 1-10 | |
| 2004 | ||
| 2 | Stephen K. Sunter, Aubin Roy, Jean-Francois Cote: An Automated, Complete, Structural Test Solution for SERDES. ITC 2004: 95-104 | |
| 1999 | ||
| 1 | Benoit Nadeau-Dostie, Jean-Francois Cote, Harry Hulvershorn, Stephen Pateras: An embedded technique for at-speed interconnect testing. ITC 1999: 431-438 | |
| 1 | Harry Hulvershorn | [1] |
| 2 | Benoit Nadeau-Dostie | [1] [3] |
| 3 | Stephen Pateras | [1] |
| 4 | Aubin Roy | [2] |
| 5 | Stephen K. Sunter (Steve Sunter) | [2] |
| 6 | Kiyoshi Takeshita | [3] |
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